Robust and optimal loading of general classical data into quantum computers

TL;DR

The paper tackles the critical bottleneck of loading classical data into quantum devices by introducing a fanin process in a tree-like bucket-brigade QRAM to suppress error propagation. It presents two protocols—2-qubit-per-node and 3-qubit-per-node—that achieve polylogarithmic infidelity growth with data size under fixed noise, while delivering state-of-the-art circuit depth, gate count, and space-time allocation; the 3-qubit-per-node variant further improves robustness and supports linear Clifford+T complexity. The methods extend to block-encoding and LCU, enabling robust embedding of general matrices and Hamiltonians, with quantified resource estimates and explicit treatments for geometrically local Hamiltonians where code-distance improvements become feasible. Overall, the approach promises practical, scalable quantum data loading for near-term and fault-tolerant regimes, with favorable implications for quantum simulations and quantum machine learning.

Abstract

As standard data loading processes, quantum state preparation and block-encoding are critical and necessary processes for quantum computing applications, including quantum machine learning, Hamiltonian simulation, and many others. Yet, existing protocols suffer from poor robustness under device imperfection, thus limiting their practicality for real-world applications. Here, this limitation is overcome based on a fanin process designed in a tree-like bucket-brigade architecture. It suppresses the error propagation between different branches, thus exponentially improving the robustness compared to existing depth-optimal methods. Moreover, the approach here simultaneously achieves the state-of-the-art fault-tolerant circuit depth, gate count, and STA. As an example of application, we show that for quantum simulation of geometrically local Hamiltonian, the code distance of each logic qubit can potentially be reduced exponentially using our technique. We believe that our technique can significantly enhance the power of quantum computing in the near-term and fault-tolerant regimes.

Figures (8)

• Figure 1: (a) Hardware architecture of quantum state preparation protocols and corresponding notations in the main text. We take $n=2$ as an example. Each circle represent a qubit, and each line represents the connection between a pair of qubits. (b) Definitions of routing ($\textbf{RT}_{l,j}$), controlled-rotation ($\textbf{CR}_{l,j}$), and swap $\textbf{S}(a,b)$ operations. In the operation $\textbf{CR}_{l,j}$, labels $*$ and $\diamond$ represent some values that make the matrix to be a unitary. (c) Sketch of how quantum state transforms during each operation in the fanin phase.
• Figure 2: Teleportated CNOT gate assisted with flying qubits at Bell state.
• Figure 3: Sketch of the 2-qubit-per-node protocol for $n=2$ case. Hollow and solid circles represent qubits at quantum states $|0\rangle$ and $|1\rangle$ respectively.
• Figure 4: Sketch of the fanin process of 3-qubit-per-node protocol for $n=2$ case. Hollow and solid circles represent qubits at quantum state $|0\rangle$ and $|1\rangle$ respectively.
• Figure 5: Sketch of the fanout process of 3-qubit-per-node protocol for $n=2$ case. Hollow and solid circles represent qubits at quantum state $|0\rangle$ and $|1\rangle$ respectively.