Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons

TL;DR

A novel SNN architecture based on the 1st Order Leaky Integrate-and-Fire (LIF) neuron model to efficiently deploy vision-based ML algorithms on TinyML systems is presented, and the proposed approach is 86% more energy efficient than the baseline.

Abstract

Tiny Machine Learning (TinyML) has become a growing field in on-device processing for Internet of Things (IoT) applications, capitalizing on AI algorithms that are optimized for their low complexity and energy efficiency. These algorithms are designed to minimize power and memory footprints, making them ideal for the constraints of IoT devices. Within this domain, Spiking Neural Networks (SNNs) stand out as a cutting-edge solution for TinyML, owning to their event-driven processing paradigm which offers an efficient method of handling dataflow. This paper presents a novel SNN architecture based on the 1st Order Leaky Integrate-and-Fire (LIF) neuron model to efficiently deploy vision-based ML algorithms on TinyML systems. A hardware-friendly LIF design is also proposed, and implemented on a Xilinx Artix-7 FPGA. To evaluate the proposed model, a collision avoidance dataset is considered as a case study. The proposed SNN model is compared to the state-of-the-art works and Binarized Convolutional Neural Network (BCNN) as a baseline. The results show the proposed approach is 86% more energy efficient than the baseline.

Figures (6)

• Figure 1: RC Circuit Analogue of a LIF neuron that emulates the behavior of a neuron. The membrane potential's response to a step input current highlights the voltage threshold for spike initiation and the subsequent reset.
• Figure 2: Visualization of Rate Coding for SNN. An input image of a vehicle is converted into spike rates, with varying input intensities: absent (0), medium (0.5), and full (1). These intensities correlate with the density of a Bernoulli-distributed spike train over time, illustrating the transformation from pixel values to temporal spike patterns.
• Figure 3: This image depicts a three-stage energy-aware framework for TinyML systems: A camera captures the scene (Sensing), visual data is translated into spikes by a neuron model (Input Data Conversion), an SNN software model predicts collision events (Software Model), and the SNN model is implemented on an FPGA (FPGA Deployment).
• Figure 4: The proposed architecture of SNN software model for TinyML applications such as collision detection onboard, featuring an input layer with 4096 neurons corresponding to image pixels, a hidden layer with 512 LIF neurons, and an output layer indicating collision or no-collision.
• Figure 5: Figure illustrating the proposed flow of hardware implementation for a Spiking Neural Network, integrating cascaded adders for input processing and a Leaky Integrate-and-Fire (LIF) neuron model with a control unit, input and weight memory, and output classification.