Noise-Aware Circuit Compilations for a Continuously Parameterized Two-Qubit Gateset

TL;DR

The paper addresses noise-limited performance on NISQ devices by tailoring circuit compilation to a trapped-ion platform with all-to-all connectivity and a continuously parameterized two-qubit gate set. It introduces a suite of noise-aware compilation optimizations in Superstaq that reduce the total entangling angle and gate count by leveraging $ZZ(\theta)$ gates, swap mirroring, gate-ranking, and circuit approximation, and evaluates them on randomized quantum-volume circuits using multiple analysis metrics. By jointly analyzing heavy-output probabilities $h_U$ and $h_A$ and the Hellinger infidelity $\mathcal{I}_H$, the work disentangles stochastic versus coherent error contributions and demonstrates meaningful improvements in quantum volume, including certifying $2^4$ on QSCOUT. The results highlight the practical impact of hardware-aware compilation on trapped-ion systems and provide a transferable methodology for optimizing fully connected, continuously parameterized gates in NISQ-era applications.

Abstract

State-of-the-art noisy-intermediate-scale quantum (NISQ) processors are currently implemented across a variety of hardware platforms, each with their own distinct gatesets. As such, circuit compilation should not only be aware of, but also deeply connect to, the native gateset and noise properties of each. Trapped-ion processors are one such platform that provides a gateset that can be continuously parameterized across both one- and two-qubit gates. Here we use the Quantum Scientific Computing Open User Testbed (QSCOUT) to study noise-aware compilations focused on continuously parameterized two-qubit $\mathcal{ZZ}$ gates (based on the Mølmer-Sørensen interaction) using $\textbf{Superstaq}$, a quantum software platform for hardware-aware circuit compiler optimizations. We discuss the realization of $\mathcal{ZZ}$ gates with arbitrary angle on the all-to-all connected trapped-ion system. Then we discuss a variety of different compiler optimizations that innately target these $\mathcal{ZZ}$ gates and their noise properties. These optimizations include moving from a restricted maximally entangling gateset to a continuously parameterized one, swap mirroring to further reduce total entangling angle of the operations, focusing the heaviest $\mathcal{ZZ}$ angle participation on the best performing gate pairs, and circuit approximation to remove the least impactful $\mathcal{ZZ}$ gates. We demonstrate these compilation approaches on the hardware with randomized quantum volume circuits, observing the potential to realize a larger quantum volume as a result of these optimizations. Using differing yet complementary analysis techniques, we observe the distinct improvements in system performance provided by these noise-aware compilations and study the role of stochastic and coherent error channels for each compilation choice.

Figures (13)

• Figure 1: Simulated unaware heavy output probabilities ($h_U$) of 400 4-qubit QV circuits as a function of error rate for a variety of coherent (solid lines of varying color) and stochastic (dashed lines of varying color) error models. Note that only the stochastic errors result in a meaningful reduction in heavy outputs.
• Figure 2: Simulated aware heavy output probabilities ($h_A$) for 400 QV 4-qubit circuits as a function of error rate for a variety of coherent (solid lines of varying color) and stochastic (dashed lines of varying color) error models.
• Figure 3: Comparison of 200 quantum volume circuits on a 4-qubit register compiled with either fixed entangling gates, $\mathcal{ZZ}(\pi/2)$ (green diamonds), or continuously parameterized entangling gates, $\mathcal{ZZ}(\theta)$ (purple squares). Analysis with a) unaware heavy outputs versus run-time circuit ordering, b) aware heavy outputs versus run-time circuit ordering, c) Hellinger infidelity vs. total entangling angle, $\Theta$, and d) per circuit change in Hellinger infidelity versus overall $\Theta$ reduction ratio, $\Gamma_{\Theta}$. In a) and b), each running mean is presented via a solid line, while $2\sigma$ Wilson score intervals are presented with shading in between the bounds with the lower bound presented via a dashed line. In d), a trend line is fit to this data and the data in Fig. \ref{['fig:mirrorSWAP']}d with a 2$\sigma$ error envelope.
• Figure 4: Comparison of 200 quantum volume circuits on a 4-qubit register compiled with continuously parameterized entangling gates, $\mathcal{ZZ}(\theta)$ with swap mirroring (orange circles, denoted "+mSWAP" in this and subsequent figures for conciseness) and without (purple squares). Analysis with a) unaware heavy outputs versus run-time circuit ordering, b) aware heavy outputs versus run-time circuit ordering, c) Hellinger infidelity vs. total entangling angle, $\Theta$, and d) per circuit change in Hellinger infidelity versus overall $\Theta$ reduction ratio, $\Gamma_{\Theta}$. In a) and b), each running mean is presented via a solid line, while $2\sigma$ Wilson score intervals are presented with shading in between the bounds with the lower bound presented via a dashed line. In d), a trend line is fit to this data and the data in Fig. \ref{['fig:cont']}d with a 2$\sigma$ error envelope. Note, Figs. \ref{['fig:cont']} and \ref{['fig:mirrorSWAP']} are the same 200 circuits, in which all three compilation choices were taken interleaved with one another.
• Figure 5: Four-ion chain with all-to-all connectivity. Nearest neighbor interactions and outer interaction (in grey brackets) are $\sim0.99$ estimated fidelity. Next-nearest-neighbor interactions (in orange brackets) intentionally depressed to $\sim0.95$ estimated fidelity.