Connectivity Labeling Schemes for Edge and Vertex Faults via Expander Hierarchies

TL;DR

A new deterministic labeling scheme for edge faults that uses $\tilde{O}(\sqrt{f})$-bit labels, which can be constructed in polynomial time, and improves on Dory and Parter's [PODC 2021] existential bound and the efficient $\tilde{O}(f^2)$-bit scheme of Izumi, Emek, Wadayama, and Masuzawa [PODC 2023].

Abstract

We consider the problem of assigning short labels to the vertices and edges of a graph $G$ so that given any query $\langle s,t,F\rangle$ with $|F|\leq f$, we can determine whether $s$ and $t$ are still connected in $G-F$, given only the labels of $F\cup\{s,t\}$. This problem has been considered when $F\subset E$ (edge faults), where correctness is guaranteed with high probability (w.h.p.) or deterministically, and when $F\subset V$ (vertex faults), both w.h.p.~and deterministically. Our main results are as follows. [Deterministic Edge Faults.] We give a new deterministic labeling scheme for edge faults that uses $\tilde{O}(\sqrt{f})$-bit labels, which can be constructed in polynomial time. This improves on Dory and Parter's [PODC 2021] existential bound of $O(f\log n)$ (requiring exponential time to compute) and the efficient $\tilde{O}(f^2)$-bit scheme of Izumi, Emek, Wadayama, and Masuzawa [PODC 2023]. Our construction uses an improved edge-expander hierarchy and a distributed coding technique based on Reed-Solomon codes. [Deterministic Vertex Faults.] We improve Parter, Petruschka, and Pettie's [STOC 2024] deterministic $O(f^7\log^{13} n)$-bit labeling scheme for vertex faults to $O(f^4\log^{7.5} n)$ bits, using an improved vertex-expander hierarchy and better sparsification of shortcut graphs. [Randomized Edge/Verex Faults.] We improve the size of Dory and Parter's [PODC 2021] randomized edge fault labeling scheme from $O(\min\{f+\log n, \log^3 n\})$ bits to $O(\min\{f+\log n, \log^2 n\log f\})$ bits, shaving a $\log n/\log f$ factor. We also improve the size of Parter, Petruschka, and Pettie's [STOC 2024] randomized vertex fault labeling scheme from $O(f^3\log^5 n)$ bits to $O(f^2\log^6 n)$ bits, which comes closer to their $Ω(f)$-bit lower bound.

Figures (6)

• Figure 1: Illustration of the top two levels of an $(h,\phi)$-expander hierarchy. $E_h$ and $E_{h-1}$ are drawn in red and blue, respectively.
• Figure 2: Left: $T^*$ on vertex set $\{a,b,c,\ldots,j\}$, rooted at $a$. Right: $\mathsf{Euler}(T^*)$.
• Figure 3: An interval $I_j\in \mathcal{I}_j$ with $\mathsf{wt}(I_j)=2^j$ ($j=3$). There are 12 level-$\ell$ edges in $E(I_j,\overline{I_j})$, $\{u_1,v_1\},\ldots,\{u_{12},v_{12}\}$, ordered by their non-$I_j$ endpoint. The large gap edges of $I_j$ are $\{u_1,v_1\},\{u_4,v_4\},\{u_5,v_5\},\{u_7,v_7\},\{u_8,v_8\},\{u_9,v_9\},\{u_{12},v_{12}\}$.
• Figure 4: Illustration of \ref{['lem:find edge']}. An interval $I_{j}\subseteq J$ is incident to $J'$. $J,J'\in\mathcal{J}$ are bounded by $\alpha_{0},\alpha_{1}\in F$ and $\alpha_{0}',\alpha_{1}'\in F$, respectively. Either $\beta_{0}$ is a large gap edge, and stored in either $L_{E}(\alpha_{0})$ or $L_{E}(\alpha_{1})$, or it is stored in $L_{E}(\beta_{1})$, where $\beta_{1}=\{x,y\}\in F$ (if it exists), or $\beta_{1}=\alpha_{0}'$.
• Figure 5: Left: an (extended) Steiner tree $T$, rooted at $a$. Right: $\mathsf{Euler}(T)$.

Theorems & Definitions (89)

• theorem 2.1
• Definition 2.2: Expander Hierarchy
• theorem 2.3
• Lemma 2.4
• proof
• proof : Proof of \ref{['thm:edge exp hie']}
• theorem 2.5
• Definition 2.6: Simple Deterministic Edge Labels
• Lemma 2.8
• proof