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Hacking the Fabric: Targeting Partial Reconfiguration for Fault Injection in FPGA Fabrics

Jayeeta Chaudhuri, Hassan Nassar, Dennis R. E. Gnad, Jorg Henkel, Mehdi B. Tahoori, Krishnendu Chakrabarty

TL;DR

This work presents a novel fault attack methodology capable of causing persistent fault injections in partial bitstreams during the process of FPGA reconfiguration, leverages powerwasters and is timed to inject faults into bitstreams as they are being loaded onto the FPGA through the reconfiguration manager.

Abstract

FPGAs are now ubiquitous in cloud computing infrastructures and reconfigurable system-on-chip, particularly for AI acceleration. Major cloud service providers such as Amazon and Microsoft are increasingly incorporating FPGAs for specialized compute-intensive tasks within their data centers. The availability of FPGAs in cloud data centers has opened up new opportunities for users to improve application performance by implementing customizable hardware accelerators directly on the FPGA fabric. However, the virtualization and sharing of FPGA resources among multiple users open up new security risks and threats. We present a novel fault attack methodology capable of causing persistent fault injections in partial bitstreams during the process of FPGA reconfiguration. This attack leverages power-wasters and is timed to inject faults into bitstreams as they are being loaded onto the FPGA through the reconfiguration manager, without needing to remain active throughout the entire reconfiguration process. Our experiments, conducted on a Pynq FPGA setup, demonstrate the feasibility of this attack on various partial application bitstreams, such as a neural network accelerator unit and a signal processing accelerator unit.

Hacking the Fabric: Targeting Partial Reconfiguration for Fault Injection in FPGA Fabrics

TL;DR

This work presents a novel fault attack methodology capable of causing persistent fault injections in partial bitstreams during the process of FPGA reconfiguration, leverages powerwasters and is timed to inject faults into bitstreams as they are being loaded onto the FPGA through the reconfiguration manager.

Abstract

FPGAs are now ubiquitous in cloud computing infrastructures and reconfigurable system-on-chip, particularly for AI acceleration. Major cloud service providers such as Amazon and Microsoft are increasingly incorporating FPGAs for specialized compute-intensive tasks within their data centers. The availability of FPGAs in cloud data centers has opened up new opportunities for users to improve application performance by implementing customizable hardware accelerators directly on the FPGA fabric. However, the virtualization and sharing of FPGA resources among multiple users open up new security risks and threats. We present a novel fault attack methodology capable of causing persistent fault injections in partial bitstreams during the process of FPGA reconfiguration. This attack leverages power-wasters and is timed to inject faults into bitstreams as they are being loaded onto the FPGA through the reconfiguration manager, without needing to remain active throughout the entire reconfiguration process. Our experiments, conducted on a Pynq FPGA setup, demonstrate the feasibility of this attack on various partial application bitstreams, such as a neural network accelerator unit and a signal processing accelerator unit.

Paper Structure

This paper contains 15 sections, 6 figures, 4 tables.

Table of Contents

  1. Introduction
  2. Background and Related Prior Work
  3. Security Threats for Multi-Tenant FPGAs
  4. Detecting FPGA-Based Attacks
  5. Persistent Attacks on FPGA Tenants During Reconfiguration
  6. Proposed Persistent Attack Methodology
  7. Threat Model
  8. Experimental Platform and Results
  9. Fundamentals of CoRQ framework
  10. Fault-Attack Evaluation
  11. Case Study 1: Fault Attack Observed via Blinking LED
  12. Case Study 2: Fault Attack on a Neural Network Accelerator Unit
  13. Case Study 3: Fault Attack on a Digital Signal Processing Unit
  14. Comparison to Runtime Fault-Injection Attacks
  15. Conclusion

Figures (6)

  • Figure 1: Proposed persistent reconfiguration fault attack.
  • Figure 2: (a) Single instance of an RO, (b) Self-clocked RO.
  • Figure 3: Implementation of CoRQ on Pynq FPGA.
  • Figure 4: Procedure of reconfiguring a partial bitstream on the FPGA through CoRQ.
  • Figure 5: Impact of fault injection (in terms of the normalized error) on a partial user design implementing the Multiply-Accumulate unit.
  • ...and 1 more figures