DUMBO: Making durable read-only transactions fly on hardware transactional memory

TL;DR

DUMBO is proposed, a new design for PHT that eliminates the two most crucial bottlenecks that hinder RO transactions in state-of-the-art PHT.

Abstract

Despite the recent improvements in supporting Persistent Hardware Transactions (PHTs) on emerging persistent memories (PM), the poor performance of Read-Only (RO) transactions remains largely overlooked. We propose DUMBO, a new design for PHT that eliminates the two most crucial bottlenecks that hinder RO transactions in state-of-the-art PHT. At its core, DUMBO exploits advanced instructions that some contemporary HTMs provide to suspend (and resume) transactional access tracking. Our experimental evaluation with an IBM POWER9 system using the TPC-C benchmark shows that DUMBO can outperform the state of the art designs for persistent hardware (SPHT) and software memory transactions (Pisces), by up to 4.0x.

Figures (9)

• Figure 1: Throughput of RO transactions in a read-dominated TPC-C workload (Payment transactions on 1 thread + multiple threads running Order status transactions).
• Figure 2: Example execution with SPHT.
• Figure 3: How SI-HTM prevents isolation violations.
• Figure 4: Comparing the throughput of SPHT and SPHT+SI-HTM, in a mix of 95% order status and 5% payment transactions from TPC-C, with disjoint warehouse accesses
• Figure 5: An example execution of DUMBO, highlighting its main optimizations