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Hiding in Plain Sight: Reframing Hardware Trojan Benchmarking as a Hide&Seek Modification

Amin Sarihi, Ahmad Patooghy, Peter Jamieson, Abdel-Hameed A. Badawy

Abstract

This work focuses on advancing security research in the hardware design space by formally defining the realistic problem of Hardware Trojan (HT) detection. The goal is to model HT detection more closely to the real world, i.e., describing the problem as The Seeker's Dilemma where a detecting agent is unaware of whether circuits are infected by HTs or not. Using this theoretical problem formulation, we create a benchmark that consists of a mixture of HT-free and HT-infected restructured circuits while preserving their original functionalities. The restructured circuits are randomly infected by HTs, causing a situation where the defender is uncertain if a circuit is infected or not. We believe that our innovative benchmark and methodology of creating benchmarks will help the community judge the detection quality of different methods by comparing their success rates in circuit classification. We use our developed benchmark to evaluate three state-of-the-art HT detection tools to show baseline results for this approach. We use Principal Component Analysis to assess the strength of our benchmark, where we observe that some restructured HT-infected circuits are mapped closely to HT-free circuits, leading to significant label misclassification by detectors.

Hiding in Plain Sight: Reframing Hardware Trojan Benchmarking as a Hide&Seek Modification

Abstract

This work focuses on advancing security research in the hardware design space by formally defining the realistic problem of Hardware Trojan (HT) detection. The goal is to model HT detection more closely to the real world, i.e., describing the problem as The Seeker's Dilemma where a detecting agent is unaware of whether circuits are infected by HTs or not. Using this theoretical problem formulation, we create a benchmark that consists of a mixture of HT-free and HT-infected restructured circuits while preserving their original functionalities. The restructured circuits are randomly infected by HTs, causing a situation where the defender is uncertain if a circuit is infected or not. We believe that our innovative benchmark and methodology of creating benchmarks will help the community judge the detection quality of different methods by comparing their success rates in circuit classification. We use our developed benchmark to evaluate three state-of-the-art HT detection tools to show baseline results for this approach. We use Principal Component Analysis to assess the strength of our benchmark, where we observe that some restructured HT-infected circuits are mapped closely to HT-free circuits, leading to significant label misclassification by detectors.

Paper Structure

This paper contains 6 sections, 5 figures.

Figures (5)

  • Figure 1: Comparison of a) current HT detection approaches with static HT benchmarks that only contain HT-infected circuits vs. b) our proposed HT detection flow, including restructured benchmarks with and without HTs
  • Figure 2: Two representations of a circuit with the same truth table. Representation #1 is aimed at improving the area in terms of comparatively fewer nodes, while representation #2 enhances delay with fewer logic levels
  • Figure 3: PCA analysis of hidden HTs vs. clean functionally transformed ISCAS-85 circuits
  • Figure 4: Detection accuracy of 18 functionally equivalent transformation methods trained with a) $S_{1}$ and b) $S_{2}$ for ISCAS-85.
  • Figure 5: The detection rate (TPs) of DETERRENT gohil2022deterrent, RL_HT_DETECT sarihi2024trojan, and HW2VEC yu2021hw2vec for hidden HT-infected ISCAS-85 circuits