An O(m+n)-Space Spatiotemporal Denoising Filter with Cache-Like Memories for Dynamic Vision Sensors

TL;DR

A lightweight and real-time spatiotemporal denoising filter with set-associative cache-like memories, which has low space complexity of O(m+n) for DVS of $m \times n$ resolution, which achieves state-of-the-art performance compared with previous spatiotemporal filters.

Abstract

Dynamic vision sensor (DVS) is novel neuromorphic imaging device that generates asynchronous events. Despite the high temporal resolution and high dynamic range features, DVS is faced with background noise problem. Spatiotemporal filter is an effective and hardware-friendly solution for DVS denoising but previous designs have large memory overhead or degraded performance issues. In this paper, we present a lightweight and real-time spatiotemporal denoising filter with set-associative cache-like memories, which has low space complexity of \text{O(m+n)} for DVS of $m\times n$ resolution. A two-stage pipeline for memory access with read cancellation feature is proposed to reduce power consumption. Further the bitwidth redundancy for event storage is exploited to minimize the memory footprint. We implemented our design on FPGA and experimental results show that it achieves state-of-the-art performance compared with previous spatiotemporal filters while maintaining low resource utilization and low power consumption of about 125mW to 210mW at 100MHz clock frequency.

Figures (10)

• Figure 1: The (a) simplified circuit schematic and (b) operational diagram of a DVS pixel.
• Figure 2: The (a) principle of spatiotemporal filter and (b-d) illustration of different architectures.
• Figure 3: The overall architecture of the proposed spatiotemporal denoising filter.
• Figure 4: The two-stage pipeline of memory access.
• Figure 5: The relation of the bitwidth of timestamp and false positive rate, indicating the potential for bitwidth reduction.