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Efficient Noise Mitigation for Enhancing Inference Accuracy in DNNs on Mixed-Signal Accelerators

Seyedarmin Azizi, Mohammad Erfan Sadeghi, Mehdi Kamal, Massoud Pedram

TL;DR

The paper tackles the problem of inference accuracy loss in DNNs deployed on mixed-signal accelerators due to process and aging-induced (temporal) variations. It introduces a probabilistic denoising block that is trained while keeping the backbone fixed, and strategically inserts this block at select layers based on gradient norms to balance denoising effectiveness with parameter overhead. The denoiser predicts a noise mean and variance and denoises in a single pass, using a hardware-friendly implementation that employs a Bottleneck-like structure, Box-Muller based Gaussian noise generation, and parallel 3x3 convolution cores with on-chip memory. Results on ImageNet-1k and CIFAR-10 show substantial robustness gains with only around 2% additional parameters, and modest latency/power overhead when integrated into a mixed-signal accelerator, indicating a practical path to reliable, energy-efficient analog-enabled inference.

Abstract

In this paper, we propose a framework to enhance the robustness of the neural models by mitigating the effects of process-induced and aging-related variations of analog computing components on the accuracy of the analog neural networks. We model these variations as the noise affecting the precision of the activations and introduce a denoising block inserted between selected layers of a pre-trained model. We demonstrate that training the denoising block significantly increases the model's robustness against various noise levels. To minimize the overhead associated with adding these blocks, we present an exploration algorithm to identify optimal insertion points for the denoising blocks. Additionally, we propose a specialized architecture to efficiently execute the denoising blocks, which can be integrated into mixed-signal accelerators. We evaluate the effectiveness of our approach using Deep Neural Network (DNN) models trained on the ImageNet and CIFAR-10 datasets. The results show that on average, by accepting 2.03% parameter count overhead, the accuracy drop due to the variations reduces from 31.7% to 1.15%.

Efficient Noise Mitigation for Enhancing Inference Accuracy in DNNs on Mixed-Signal Accelerators

TL;DR

The paper tackles the problem of inference accuracy loss in DNNs deployed on mixed-signal accelerators due to process and aging-induced (temporal) variations. It introduces a probabilistic denoising block that is trained while keeping the backbone fixed, and strategically inserts this block at select layers based on gradient norms to balance denoising effectiveness with parameter overhead. The denoiser predicts a noise mean and variance and denoises in a single pass, using a hardware-friendly implementation that employs a Bottleneck-like structure, Box-Muller based Gaussian noise generation, and parallel 3x3 convolution cores with on-chip memory. Results on ImageNet-1k and CIFAR-10 show substantial robustness gains with only around 2% additional parameters, and modest latency/power overhead when integrated into a mixed-signal accelerator, indicating a practical path to reliable, energy-efficient analog-enabled inference.

Abstract

In this paper, we propose a framework to enhance the robustness of the neural models by mitigating the effects of process-induced and aging-related variations of analog computing components on the accuracy of the analog neural networks. We model these variations as the noise affecting the precision of the activations and introduce a denoising block inserted between selected layers of a pre-trained model. We demonstrate that training the denoising block significantly increases the model's robustness against various noise levels. To minimize the overhead associated with adding these blocks, we present an exploration algorithm to identify optimal insertion points for the denoising blocks. Additionally, we propose a specialized architecture to efficiently execute the denoising blocks, which can be integrated into mixed-signal accelerators. We evaluate the effectiveness of our approach using Deep Neural Network (DNN) models trained on the ImageNet and CIFAR-10 datasets. The results show that on average, by accepting 2.03% parameter count overhead, the accuracy drop due to the variations reduces from 31.7% to 1.15%.
Paper Structure (21 sections, 7 equations, 3 figures, 2 tables)

This paper contains 21 sections, 7 equations, 3 figures, 2 tables.

Table of Contents

  1. Introduction
  2. Background
  3. Denoising in Deep Learning
  4. Analog MVM Reliability
  5. Related work
  6. Training-based methods
  7. Stochastic computing based methods
  8. ECC-based methods
  9. Methodology
  10. Denoising Overview
  11. Denoising block
  12. Integration of Denoising Block
  13. Denoiser Hardware Architecture
  14. Overall architecture
  15. Noise cancellation architecture
  16. ...and 6 more sections

Figures (3)

  • Figure 1: The proposed denoising block.
  • Figure 2: The denoising block hardware architecture
  • Figure 3: Cycle count for ResNet-18 layers