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Hardware-efficient quantum error correction via concatenated bosonic qubits

Harald Putterman, Kyungjoo Noh, Connor T. Hann, Gregory S. MacCabe, Shahriar Aghaeimeibodi, Rishi N. Patel, Menyoung Lee, William M. Jones, Hesam Moradinejad, Roberto Rodriguez, Neha Mahuli, Jefferson Rose, John Clai Owens, Harry Levine, Emma Rosenfeld, Philip Reinhold, Lorenzo Moncelsi, Joshua Ari Alcid, Nasser Alidoust, Patricio Arrangoiz-Arriola, James Barnett, Przemyslaw Bienias, Hugh A. Carson, Cliff Chen, Li Chen, Harutiun Chinkezian, Eric M. Chisholm, Ming-Han Chou, Aashish Clerk, Andrew Clifford, R. Cosmic, Ana Valdes Curiel, Erik Davis, Laura DeLorenzo, J. Mitchell D'Ewart, Art Diky, Nathan D'Souza, Philipp T. Dumitrescu, Shmuel Eisenmann, Essam Elkhouly, Glen Evenbly, Michael T. Fang, Yawen Fang, Matthew J. Fling, Warren Fon, Gabriel Garcia, Alexey V. Gorshkov, Julia A. Grant, Mason J. Gray, Sebastian Grimberg, Arne L. Grimsmo, Arbel Haim, Justin Hand, Yuan He, Mike Hernandez, David Hover, Jimmy S. C. Hung, Matthew Hunt, Joe Iverson, Ignace Jarrige, Jean-Christophe Jaskula, Liang Jiang, Mahmoud Kalaee, Rassul Karabalin, Peter J. Karalekas, Andrew J. Keller, Amirhossein Khalajhedayati, Aleksander Kubica, Hanho Lee, Catherine Leroux, Simon Lieu, Victor Ly, Keven Villegas Madrigal, Guillaume Marcaud, Gavin McCabe, Cody Miles, Ashley Milsted, Joaquin Minguzzi, Anurag Mishra, Biswaroop Mukherjee, Mahdi Naghiloo, Eric Oblepias, Gerson Ortuno, Jason Pagdilao, Nicola Pancotti, Ashley Panduro, JP Paquette, Minje Park, Gregory A. Peairs, David Perello, Eric C. Peterson, Sophia Ponte, John Preskill, Johnson Qiao, Gil Refael, Rachel Resnick, Alex Retzker, Omar A. Reyna, Marc Runyan, Colm A. Ryan, Abdulrahman Sahmoud, Ernesto Sanchez, Rohan Sanil, Krishanu Sankar, Yuki Sato, Thomas Scaffidi, Salome Siavoshi, Prasahnt Sivarajah, Trenton Skogland, Chun-Ju Su, Loren J. Swenson, Stephanie M. Teo, Astrid Tomada, Giacomo Torlai, E. Alex Wollack, Yufeng Ye, Jessica A. Zerrudo, Kailing Zhang, Fernando G. S. L. Brandão, Matthew H. Matheny, Oskar Painter

TL;DR

This work demonstrates hardware-efficient quantum error correction by concatenating bosonic cat-qubits with an outer distance-5 repetition code on a superconducting platform. Cat qubits inherently suppress bit-flip errors, while phase-flip errors are mitigated by the repetition code, with a noise-biased CX gate enabling reliable syndrome extraction. The experiment achieves sub-2% logical error per cycle, with the distance-5 code outperforming distance-3 at moderate cat photon numbers, and shows that erasure-aware decoding further improves performance. Collectively, the results establish concatenated bosonic codes as a promising route toward fault-tolerant quantum computation with reduced hardware overhead, and point to scalable future directions such as bias-adapted surface codes and cat-cat gate architectures.

Abstract

In order to solve problems of practical importance, quantum computers will likely need to incorporate quantum error correction, where a logical qubit is redundantly encoded in many noisy physical qubits. The large physical-qubit overhead typically associated with error correction motivates the search for more hardware-efficient approaches. Here, using a microfabricated superconducting quantum circuit, we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance $d=5$. The bosonic cat qubits are passively protected against bit flips using a stabilizing circuit. Cat-qubit phase-flip errors are corrected by the repetition code which uses ancilla transmons for syndrome measurement. We realize a noise-biased CX gate which ensures bit-flip error suppression is maintained during error correction. We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below threshold, with logical phase-flip error decreasing with code distance from $d=3$ to $d=5$. Concurrently, the logical bit-flip error is suppressed with increasing cat-qubit mean photon number. The minimum measured logical error per cycle is on average $1.75(2)\%$ for the distance-3 code sections, and $1.65(3)\%$ for the longer distance-5 code, demonstrating the effectiveness of bit-flip error suppression throughout the error correction cycle. These results, where the intrinsic error suppression of the bosonic encodings allows us to use a hardware-efficient outer error correcting code, indicate that concatenated bosonic codes are a compelling paradigm for reaching fault-tolerant quantum computation.

Hardware-efficient quantum error correction via concatenated bosonic qubits

TL;DR

This work demonstrates hardware-efficient quantum error correction by concatenating bosonic cat-qubits with an outer distance-5 repetition code on a superconducting platform. Cat qubits inherently suppress bit-flip errors, while phase-flip errors are mitigated by the repetition code, with a noise-biased CX gate enabling reliable syndrome extraction. The experiment achieves sub-2% logical error per cycle, with the distance-5 code outperforming distance-3 at moderate cat photon numbers, and shows that erasure-aware decoding further improves performance. Collectively, the results establish concatenated bosonic codes as a promising route toward fault-tolerant quantum computation with reduced hardware overhead, and point to scalable future directions such as bias-adapted surface codes and cat-cat gate architectures.

Abstract

In order to solve problems of practical importance, quantum computers will likely need to incorporate quantum error correction, where a logical qubit is redundantly encoded in many noisy physical qubits. The large physical-qubit overhead typically associated with error correction motivates the search for more hardware-efficient approaches. Here, using a microfabricated superconducting quantum circuit, we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance . The bosonic cat qubits are passively protected against bit flips using a stabilizing circuit. Cat-qubit phase-flip errors are corrected by the repetition code which uses ancilla transmons for syndrome measurement. We realize a noise-biased CX gate which ensures bit-flip error suppression is maintained during error correction. We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below threshold, with logical phase-flip error decreasing with code distance from to . Concurrently, the logical bit-flip error is suppressed with increasing cat-qubit mean photon number. The minimum measured logical error per cycle is on average for the distance-3 code sections, and for the longer distance-5 code, demonstrating the effectiveness of bit-flip error suppression throughout the error correction cycle. These results, where the intrinsic error suppression of the bosonic encodings allows us to use a hardware-efficient outer error correcting code, indicate that concatenated bosonic codes are a compelling paradigm for reaching fault-tolerant quantum computation.
Paper Structure (60 sections, 29 equations, 44 figures)

This paper contains 60 sections, 29 equations, 44 figures.

Figures (44)

  • Figure 1: Repetition code of bosonic qubits. (a) Schematic diagram of the repetition code device. Data qubits $\text{S1}, \cdots, \text{S5}$ (blue) are encoded into the Hilbert space of a quantum harmonic oscillator. Two photons from each oscillator are exchanged with a photon in a damped buffer mode $\text{B1}, \cdots, \text{B5}$ (green). The ancilla qubits $\text{A1}, \cdots, \text{A4}$ (orange) are transmon qubits which detect $Z$ errors on the data qubits by measuring repetition-code stabilizers. Here we show a $Z$ error on a data qubit being detected by two ancilla qubits. (b) Circuit layout of the repetition code device. The five bosonic modes ($S_i$) are implemented as coplanar waveguide resonators. Each resonator is connected to a buffer mode ($B_i$). Buffer modes are damped through a multi-pole filter. Ancilla transmons ($A_i$) are connected to the storage modes by tunable couplers ($C_{i,j}$). The device is formed from two chips bump-bonded together with linear elements (e.g., storage modes, readout resonators, and filters) on the bottom chip and nonlinear elements (e.g., ancillas, couplers, and buffers) on the top chip. Zoomed-in circuit sections showing (c) a storage-buffer subsystem and (d) an ancilla transmon coupled to its neighboring storage modes by tunable couplers. (e) Cat qubit encoding in a bosonic mode. We show experimentally measured Wigner functions of the four basis states of a cat qubit with arrows representing $X$ and $Z$ errors. (f) Bit-flip and phase-flip times of the five cat qubits in our device under simultaneous two-photon dissipation. Error bars incorporate sampling variance and fit uncertainty.
  • Figure 2: Noise-biased $\text{CX}$ gate between a transmon and a cat qubit. (a) CX gate sequence. At the start of the sequence the ancilla is initialized and cat-qubit stabilization (blue arrows) is on. The stabilization is then turned off and the CX gate is applied between the ancilla and cat qubit. After the CX gate, the stabilization is turned back on and the ancilla qubit is readout and reset to $|g\rangle$. Through the experimentally measured Wigner functions, we show the evolution of the storage state during the sequence for each of the ancilla states $|g\rangle$, $|e\rangle$, and $|f\rangle$, with an initial storage-mode state $|\alpha\rangle$. (b) Storage-mode Wigner tomograms before and after 10 applications of the CX gate sequence with the ancilla in $|g\rangle$ and storage initialized in $|\alpha\rangle$. The sequence is applied with and without stabilization to show the importance of stabilization in preventing error accumulation. (c) Characterization of the CX gate. We apply repeated CX$^2$ cycles (see main text) with a 3us cycle duration, and plot the measured bit-flip time of the cat qubit as a function of cat-qubit photon-number, $|\alpha|^2$, for different ancilla states. Inset shows the measured phase-flip times when the ancilla is initialized to $|g\rangle+|f\rangle$. Error bars incorporate sampling variance and fit uncertainty.
  • Figure 3: Detecting and correcting phase-flip errors with the repetition code. (a) Error correction circuit, showing repeated error correction cycles with duration $2.8~\mathrm{\mu s}$. (b) Detection probabilities for the measured stabilizers versus error correction cycle for three different cat qubit photon numbers, $|\alpha|^2=1,2,3$. Bold traces correspond to the average over the individual stabilizer traces. Error bars represent standard error of the mean. (c) Depiction of erasures occurring in the repetition code experiment due to ancilla decay from $|f\rangle$ to $|e\rangle$. We show shots of the experiment from a representative stabilizer where $|f\rangle$ is light gray, $|g\rangle$ is dark gray, and the erasure state $|e\rangle$ is shown in red. (d) Effective measurement error before and after accounting for the erasure for $|\alpha|^2=1$. Bold traces correspond to averaging over the stabilizers. (e) Example fits of the decay of the $X$ logical operator for the distance-5 repetition code for different photon numbers. (f) Error corrected logical phase-flip probability per cycle ($\epsilon_{L, \text{phase-flip}} = p_Z+p_Y$) and logical $X$ lifetime ($T_X$) as a function of $|\alpha|^2$ for the different repetition code sections. Data and fits are shown with (squares and solid curves) and without (circles and dashed curves) inclusion of erasure information. The fits are to the power law $(|\alpha|^2)^\gamma$ for $|\alpha|^2 \geq 1.5$. Faded points indicate fits binned by the number of even cat states $|+\rangle$ in the initial state and serve to indicate the spread from asymmetric error rates at low photon number (see \ref{['app:distribution_of_initial_states_in_logical_X_lifetime_experiments']} for more details). The dotted purple curve shows the simulated logical phase-flip probability for the distance-5 section. Error bars incorporate sampling variance and fit uncertainty.
  • Figure 4: Characterizing logical bit-flip error rates. (a) Fitted decay curve of the logical $Z$ operator for several storage mean photon numbers for the distance-5 code. Error bars represent sampling variance. (b) Logical bit-flip probability per cycle ($\epsilon_{L,\text{bit-flip}} = p_X+p_Y$) and logical $Z$ lifetime ($T_Z$) as a function of $|\alpha|^2$ for the two distance-3 repetition-code sections and the distance-5 section. Solid lines correspond to data and dotted lines correspond to a phenomenological model. Error bars, capturing sampling variance and fit uncertainty, are smaller than the markers.
  • Figure 5: Logical qubit memory performance. (a) Overall logical error per cycle of the repetition cat code, $\epsilon_{L}=(\epsilon_{L, \text{bit-flip}}+\epsilon_{L, \text{phase-flip}})/2 = (p_X + 2p_Y + p_Z)/2$, versus cat qubit mean photon number $|\alpha|^2$. As in \ref{['fig:logical_X']}(f), the faded points correspond to fits to groupings of the data by the number of even cat states in the initial state. The lines are guides to the eye, computed by interpolating both the logical phase-flip and bit-flip probabilities, $\epsilon_{L,\text{phase-flip}}$ and $\epsilon_{L,\text{bit-flip}}$, respectively. (b) Error budget for the distance-5 repetition code using erasure information. Different shades of color correspond to the different per cat (or per CX gate) contribution to the error budget. Error bar incorporate sampling variance and fit uncertainty.
  • ...and 39 more figures