Development of High-Performance DSP Algorithms on the European Rad-Hard NG-ULTRA SoC FPGA

TL;DR

This paper addresses the challenge of delivering high-performance, reliable DSP on European radiation-hardened FPGAs by evaluating NG-ULTRA, the first European 28-nm radiation-hardened SoC FPGA. It presents a comprehensive development and testing methodology using the Impulse toolflow and HDL-level exploration to optimize DSP kernels for space applications, integrated with the DAHLIA SoC on NG-ULTRA. The experimental results show competitive resource utilization and meaningful throughput improvements versus 3rd-party devices, despite lower clock frequencies inherent to radiation-hardened fabrics, and demonstrate usable CPU performance with CoreMark up to 3.108 CoreMarks per MHz. The work substantiates NG-ULTRA as a promising platform for European space missions and outlines future HW/SW co-design opportunities to further enhance performance.

Abstract

The emergence of demanding space applications has modified the traditional landscape of computing systems in space. When reliability is a first-class concern, in addition to enhanced performance-per-Watt, radiation-hardened FPGAs are favored. In this context, the current paper evaluates the first European radiation-hardened SoC FPGA, i.e., NanoXplore's NG-ULTRA, for accelerating high-performance DSP algorithms from space applications. The proposed development & testing methodologies provide efficient implementations, while they also aim to test the new NG-ULTRA hardware and its associated software tools. The results show that NG-ULTRA achieves competitive resource utilization and performance, constituting it as a very promising device for space missions, especially for Europe.

Figures (2)

• Figure 1: Methodology for synthesizing DSP kernels on BRAVE FPGAs.
• Figure 2: Methodology for placing & routing DSP kernels on BRAVE FPGAs.