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MTLSO: A Multi-Task Learning Approach for Logic Synthesis Optimization

Faezeh Faez, Raika Karimi, Yingxue Zhang, Xing Li, Lei Chen, Mingxuan Yuan, Mahdi Biparva

TL;DR

This work proposes MTLSO - a Multi-Task Learning approach for Logic Synthesis Optimization, which employs a hierarchical graph representation learning strategy to improve the model's capacity for learning expressive graph-level representations of large AIGs, surpassing traditional plain GNNs.

Abstract

Electronic Design Automation (EDA) is essential for IC design and has recently benefited from AI-based techniques to improve efficiency. Logic synthesis, a key EDA stage, transforms high-level hardware descriptions into optimized netlists. Recent research has employed machine learning to predict Quality of Results (QoR) for pairs of And-Inverter Graphs (AIGs) and synthesis recipes. However, the severe scarcity of data due to a very limited number of available AIGs results in overfitting, significantly hindering performance. Additionally, the complexity and large number of nodes in AIGs make plain GNNs less effective for learning expressive graph-level representations. To tackle these challenges, we propose MTLSO - a Multi-Task Learning approach for Logic Synthesis Optimization. On one hand, it maximizes the use of limited data by training the model across different tasks. This includes introducing an auxiliary task of binary multi-label graph classification alongside the primary regression task, allowing the model to benefit from diverse supervision sources. On the other hand, we employ a hierarchical graph representation learning strategy to improve the model's capacity for learning expressive graph-level representations of large AIGs, surpassing traditional plain GNNs. Extensive experiments across multiple datasets and against state-of-the-art baselines demonstrate the superiority of our method, achieving an average performance gain of 8.22\% for delay and 5.95\% for area.

MTLSO: A Multi-Task Learning Approach for Logic Synthesis Optimization

TL;DR

This work proposes MTLSO - a Multi-Task Learning approach for Logic Synthesis Optimization, which employs a hierarchical graph representation learning strategy to improve the model's capacity for learning expressive graph-level representations of large AIGs, surpassing traditional plain GNNs.

Abstract

Electronic Design Automation (EDA) is essential for IC design and has recently benefited from AI-based techniques to improve efficiency. Logic synthesis, a key EDA stage, transforms high-level hardware descriptions into optimized netlists. Recent research has employed machine learning to predict Quality of Results (QoR) for pairs of And-Inverter Graphs (AIGs) and synthesis recipes. However, the severe scarcity of data due to a very limited number of available AIGs results in overfitting, significantly hindering performance. Additionally, the complexity and large number of nodes in AIGs make plain GNNs less effective for learning expressive graph-level representations. To tackle these challenges, we propose MTLSO - a Multi-Task Learning approach for Logic Synthesis Optimization. On one hand, it maximizes the use of limited data by training the model across different tasks. This includes introducing an auxiliary task of binary multi-label graph classification alongside the primary regression task, allowing the model to benefit from diverse supervision sources. On the other hand, we employ a hierarchical graph representation learning strategy to improve the model's capacity for learning expressive graph-level representations of large AIGs, surpassing traditional plain GNNs. Extensive experiments across multiple datasets and against state-of-the-art baselines demonstrate the superiority of our method, achieving an average performance gain of 8.22\% for delay and 5.95\% for area.
Paper Structure (21 sections, 15 equations, 3 figures, 3 tables)

This paper contains 21 sections, 15 equations, 3 figures, 3 tables.

Figures (3)

  • Figure 1: Overview of our MTLSO model consisting of four main components: Graph Encoder, Recipe Encoder, Binary Multi-label Graph Classifier, and Decoder. The model parameters are jointly learned through multi-task learning, optimizing both graph classification and regression tasks, which enables the model to benefit from shared representations and inter-task dependencies.
  • Figure 2: Ablation Study on the Number of Successive Graph Encoding/Downsampling Layers ($L$). The results are reported as percentages. Each row of subplots corresponds to one dataset, and each column corresponds to an evaluation metric.
  • Figure 3: Ablation Study on the Node Retainment Ratio ($\alpha$) of the Graph Downsampling Module. The results are reported as percentages. Each row of subplots corresponds to one dataset, and each column corresponds to an evaluation metric.