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RayFlex: An Open-Source RTL Implementation of the Hardware Ray Tracer Datapath

Fangjia Shen, Aaron Barnes, Anusuya Nallathambi, Timothy G. Rogers

TL;DR

RayFlex addresses the need for an open, research-friendly RTL model of a hardware ray-tracing datapath to study design choices beyond fixed-function pipelines. It introduces a first-of-its-kind open-source Chisel implementation featuring two core concepts: a parameterized RayFlex Skid Buffer and a Shared RayFlex Data Structure, enabling easy extension of BVH operations and addition of new computations. Through two case studies, the authors extend the datapath to support Euclidean and cosine distance calculations, showing a 36% area overhead and about 20% power overhead, and compare unified versus disjoint pipelines to illustrate reuse vs. isolation trade-offs. RayFlex is positioned as a complementary research platform to Vulkan-Sim, offering detailed datapath-level visibility and open-source accessibility to accelerate experimentation in programmable hardware RT units.

Abstract

The advent of hardware ray tracing (RT) units has brought unprecedented realism to real-time rendered computer graphics. However, the potential of these units extends beyond graphics, offering acceleration for various computational tasks such as tree traversal and nearest-neighbor search. We introduce RayFlex, a first-of-its-kind open-source RTL implementation of a hardware ray tracer datapath designed to facilitate research in general-purpose programmable RT units. RayFlex's architecture is both extensible and flexible, thanks to two core design concepts: the parameterized RayFlex Skid Buffer module and the "defined-once-instantiated-everywhere" Shared RayFlex Data Structure. This makes RayFlex an ideal testing ground for academic research and exploration. Our implementation allows researchers to explore various design choices, fostering a realistic understanding of hardware ray tracer design trade-offs. Through comprehensive case studies, we demonstrate the versatility of RayFlex in evaluating different pipeline configurations and extending its functionality to support additional computational tasks. We show that by extending the functionality of a baseline RT unit datapath with an area cost of 36 percent and a power overhead of about 20 percent, the RT unit can calculate the Euclidean distance and cosine distance of vectors of arbitrary dimension, thereby accelerating a broader range of data-analytics workloads. The source code of RayFlex is available at https://github.com/purdue-aalp/rayflex.

RayFlex: An Open-Source RTL Implementation of the Hardware Ray Tracer Datapath

TL;DR

RayFlex addresses the need for an open, research-friendly RTL model of a hardware ray-tracing datapath to study design choices beyond fixed-function pipelines. It introduces a first-of-its-kind open-source Chisel implementation featuring two core concepts: a parameterized RayFlex Skid Buffer and a Shared RayFlex Data Structure, enabling easy extension of BVH operations and addition of new computations. Through two case studies, the authors extend the datapath to support Euclidean and cosine distance calculations, showing a 36% area overhead and about 20% power overhead, and compare unified versus disjoint pipelines to illustrate reuse vs. isolation trade-offs. RayFlex is positioned as a complementary research platform to Vulkan-Sim, offering detailed datapath-level visibility and open-source accessibility to accelerate experimentation in programmable hardware RT units.

Abstract

The advent of hardware ray tracing (RT) units has brought unprecedented realism to real-time rendered computer graphics. However, the potential of these units extends beyond graphics, offering acceleration for various computational tasks such as tree traversal and nearest-neighbor search. We introduce RayFlex, a first-of-its-kind open-source RTL implementation of a hardware ray tracer datapath designed to facilitate research in general-purpose programmable RT units. RayFlex's architecture is both extensible and flexible, thanks to two core design concepts: the parameterized RayFlex Skid Buffer module and the "defined-once-instantiated-everywhere" Shared RayFlex Data Structure. This makes RayFlex an ideal testing ground for academic research and exploration. Our implementation allows researchers to explore various design choices, fostering a realistic understanding of hardware ray tracer design trade-offs. Through comprehensive case studies, we demonstrate the versatility of RayFlex in evaluating different pipeline configurations and extending its functionality to support additional computational tasks. We show that by extending the functionality of a baseline RT unit datapath with an area cost of 36 percent and a power overhead of about 20 percent, the RT unit can calculate the Euclidean distance and cosine distance of vectors of arbitrary dimension, thereby accelerating a broader range of data-analytics workloads. The source code of RayFlex is available at https://github.com/purdue-aalp/rayflex.
Paper Structure (30 sections, 9 figures, 1 algorithm)

This paper contains 30 sections, 9 figures, 1 algorithm.

Figures (9)

  • Figure 1: Left: The surface of this bunny consists of many triangle primitives. Triangles are grouped into nested Axis-Aligned Bounding Boxes to form a Hierarchical Bounding Volume (BVH). Right: Nested boxes become parents and children in the BVH tree.
  • Figure 2: The GPGPU architecture and the RT Unit's position.
  • Figure 3: Activity diagram (per thread) of the IMAGE_BVH_INTERSECT_RAY instruction. The highlighted activities happen inside RayFlex.
  • Figure 4: The dataflow and pipeline stages of RayFlex.
  • Figure 5: The pipeline architecture of RayFlex.
  • ...and 4 more figures