NAS-Cap: Deep-Learning Driven 3-D Capacitance Extraction with Neural Architecture Search and Data Augmentation
Haoyuan Li, Dingcheng Yang, Chunyan Pei, Wenjian Yu
TL;DR
The paper tackles the challenge of accurate and efficient 3-D capacitance extraction for IC interconnects by applying neural architecture search (DrNAS-style) to design a CNN tailored for 3-D data, complemented by a data augmentation strategy that multiplies training instances by 8×. It introduces NAS-Cap, a cell-based CNN with normal and reduction cells that optimizes architecture weights and connection weights to minimize mean square relative error for total and coupling capacitances, while avoiding BN in most cells. The approach yields substantial accuracy gains over the prior CNN-Cap, particularly for coupling capacitance, and reduces model size and inference time, with demonstrated transferability across different designs and process technologies. Overall, NAS-Cap offers a practical, scalable route to surpass pattern-matching accuracy and approach field-solver-like precision for full-chip capacitance extraction in complex ICs.
Abstract
More accurate capacitance extraction is demanded for designing integrated circuits under advanced process technology. The pattern matching approach and the field solver for capacitance extraction have the drawbacks of inaccuracy and large computational cost, respectively. Recent work \cite{yang2023cnn} proposes a grid-based data representation and a convolutional neural network (CNN) based capacitance models (called CNN-Cap), which opens the third way for 3-D capacitance extraction to get accurate results with much less time cost than field solver. In this work, the techniques of neural architecture search (NAS) and data augmentation are proposed to train better CNN models for 3-D capacitance extraction. Experimental results on datasets from different designs show that the obtained NAS-Cap models achieve remarkably higher accuracy than CNN-Cap, while consuming less runtime for inference and space for model storage. Meanwhile, the transferability of the NAS is validated, as the once searched architecture brought similar error reduction on coupling/total capacitance for the test cases from different design and/or process technology.
