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OPTDTALS: Approximate Logic Synthesis via Optimal Decision Trees Approach

Hao Hu, Shaowei Cai

TL;DR

The paper tackles ALS in circuit design under the lens of XAI by enforcing interpretable models to approximate logic while controlling complexity. It introduces OPTDTALS, which learns optimal decision trees in empirical accuracy to guarantee optimality in QoR, with depth bounds serving as the primary knob controlling circuit complexity. The approach scales to large circuits through sub-circuit partitioning (KahyPar) and a design-space exploration heuristic that iteratively substitutes sub-circuits. Experimental results on IWLS 2020 benchmarks and ISCAS combinatorial circuits show substantial reductions in circuit area and gate counts with competitive accuracy, outperforming state-of-the-art ALS methods in several settings, though scalability remains a challenge for very large designs.

Abstract

The growing interest in Explainable Artificial Intelligence (XAI) motivates promising studies of computing optimal Interpretable Machine Learning models, especially decision trees. Such models generally provide optimality in compact size or empirical accuracy. Recent works focus on improving efficiency due to the natural scalability issue. The application of such models to practical problems is quite limited. As an emerging problem in circuit design, Approximate Logic Synthesis (ALS) aims to reduce circuit complexity by sacrificing correctness. Recently, multiple heuristic machine learning methods have been applied in ALS, which learns approximated circuits from samples of input-output pairs. In this paper, we propose a new ALS methodology realizing the approximation via learning optimal decision trees in empirical accuracy. Compared to previous heuristic ALS methods, the guarantee of optimality achieves a more controllable trade-off between circuit complexity and accuracy. Experimental results show clear improvements in our methodology in the quality of approximated designs (circuit complexity and accuracy) compared to the state-of-the-art approaches.

OPTDTALS: Approximate Logic Synthesis via Optimal Decision Trees Approach

TL;DR

The paper tackles ALS in circuit design under the lens of XAI by enforcing interpretable models to approximate logic while controlling complexity. It introduces OPTDTALS, which learns optimal decision trees in empirical accuracy to guarantee optimality in QoR, with depth bounds serving as the primary knob controlling circuit complexity. The approach scales to large circuits through sub-circuit partitioning (KahyPar) and a design-space exploration heuristic that iteratively substitutes sub-circuits. Experimental results on IWLS 2020 benchmarks and ISCAS combinatorial circuits show substantial reductions in circuit area and gate counts with competitive accuracy, outperforming state-of-the-art ALS methods in several settings, though scalability remains a challenge for very large designs.

Abstract

The growing interest in Explainable Artificial Intelligence (XAI) motivates promising studies of computing optimal Interpretable Machine Learning models, especially decision trees. Such models generally provide optimality in compact size or empirical accuracy. Recent works focus on improving efficiency due to the natural scalability issue. The application of such models to practical problems is quite limited. As an emerging problem in circuit design, Approximate Logic Synthesis (ALS) aims to reduce circuit complexity by sacrificing correctness. Recently, multiple heuristic machine learning methods have been applied in ALS, which learns approximated circuits from samples of input-output pairs. In this paper, we propose a new ALS methodology realizing the approximation via learning optimal decision trees in empirical accuracy. Compared to previous heuristic ALS methods, the guarantee of optimality achieves a more controllable trade-off between circuit complexity and accuracy. Experimental results show clear improvements in our methodology in the quality of approximated designs (circuit complexity and accuracy) compared to the state-of-the-art approaches.
Paper Structure (12 sections, 2 equations, 4 figures, 6 tables, 2 algorithms)

This paper contains 12 sections, 2 equations, 4 figures, 6 tables, 2 algorithms.

Table of Contents

  1. Introduction
  2. Technical Background
  3. Quality-of-Result Metric
  4. Decision Trees
  5. Related Works
  6. Proposed Methodology
  7. Circuit Approximation Via Optimal Decision Trees
  8. Scaling Up for Large Circuits
  9. Experimental Results
  10. Evaluation in the IWLS Contest 2020 Benchmarks
  11. Evaluation in the Combinatorial Circuits
  12. Conclusion

Figures (4)

  • Figure 1: An Illustrative Example of OPTDTALS using DL8.5 algorithm to learn optimal decision trees with various maximum depths. The wrong predictions are marked in red. Circuits are synthesized via Yosys using the open ssxlib013 Liberty.
  • Figure 2: Evaluation of different methods in the IWLS Contest 2020 benchmarks. The left (right) scatter shows the testing accuracy (the number of $AND$ gates).
  • Figure 3: The general framework of OPTDTALS tool-chain.
  • Figure 4: Tendency of area utilization (the left scatter), power (the middle one), and delay (the right one) of approximated designs of different methods using different step sizes with the increase of error for the C6288 circuit.