Automated Synthesis of Fault-Tolerant State Preparation Circuits for Quantum Error Correction Codes

TL;DR

This work tackles the challenge of fault-tolerant initialization of logical states for CSS quantum error-correcting codes by introducing automated, SAT-based methods to synthesize depth- and gate-optimal state-preparation circuits and their corresponding verification circuits. It separates the synthesis of preparation and verification, provides optimal and heuristic strategies, and generalizes non-deterministic fault-tolerant state preparation beyond distance-$3$ codes. The authors validate the approach with numerical experiments on $d=3$ and $d=5$ codes, demonstrating the expected logical-error-rate scaling and competitive performance against reinforcement-learning methods, while also releasing open-source tooling in the Munich Quantum Toolkit. They also discuss scalability, the role of flag-fault-tolerant measurements, and the practical considerations for near-term hardware. Overall, the paper delivers a systematic, automated framework for constructing fault-tolerant, code-agnostic state preparation circuits that could enable more reliable near-term demonstrations of fault-tolerant quantum computing.

Abstract

A central ingredient in fault-tolerant quantum algorithms is the initialization of a logical state for a given quantum error-correcting code from a set of noisy qubits. A scheme that has demonstrated promising results for small code instances that are realizable on currently available hardware composes a non-fault-tolerant state preparation step with a verification step that checks for spreading errors. Known circuit constructions of this scheme are mostly obtained manually, and no algorithmic techniques for constructing depth- or gate-optimal circuits exist. As a consequence, the current state of the art exploits this scheme only for specific code instances and mostly for the special case of distance 3 codes. In this work, we propose an automated approach for synthesizing fault-tolerant state preparation circuits for arbitrary CSS codes. We utilize methods based on satisfiability solving (SAT) techniques to construct fault-tolerant state preparation circuits consisting of depth- and gate-optimal preparation and verification circuits. We also provide heuristics that can synthesize fault-tolerant state preparation circuits for code instances where no optimal solution can be obtained in an adequate timeframe. Moreover, we give a general construction for non-deterministic state preparation circuits beyond distance 3. Numerical evaluations using $d=3$ and $d=5$ codes confirm that the generated circuits exhibit the desired scaling of the logical error rates. The resulting methods are publicly available as part of the Munich Quantum Toolkit (MQT) at https://github.com/cda-tum/mqt-qecc. Such methods are an important step in providing fault-tolerant circuit constructions that can aid in near-term demonstration of fault-tolerant quantum computing.

Figures (21)

• Figure 1: Full non-deterministic fault-tolerant state preparation protocol for CSS codes. A sequence of stabilizer measurements follows a non-fault-tolerant state preparation circuit to check if any errors propagated through the circuit. The state is accepted if no measurement in the verification blocks indicates an error. (a) Errors in the non-fault-tolerant state preparation circuits propagate to higher-weight errors through CNOTs between data qubits. (b) If an error of at most weight $i$ occurred in the state preparation circuit and propagated to a higher-weight error, measurements in the $i$th layer of the verification circuit detect this error. (c) Propagated errors are still detected by later layers of verification, even if further errors occur during a stabilizer measurement. (d) Z errors on the ancilla during the verification of X errors propagate to the data qubits. (e) If a Z error propagated through the non-FT state preparation circuit or the Z measurements of the previous verifications, it is later detected by flag fault-tolerant measurements. (f) Propagated X errors on the X measurement ancillas are detected by flag qubit measurements.
• Figure 2: Steane code. The qubits are placed on vertices and X- and Z-stabilizer checks are associated with faces, acting on adjacent vertices.
• Figure 3: Fault-tolerant Pauli-eigenstate preparation for stabilizer codes. A state is prepared with a non-fault-tolerant encoding circuit, and the state is post-selected on a set of stabilizer measurements called the verification circuit. If one of these measurements flags, the state is discarded, and the process is restarted.
• Figure 4: Non-deterministic state preparation for the $\ket{0}_L$ of the Steane code from Ref. gotoMinimizingResourceOverheads2016.
• Figure 5: Symbolic encoding for optimal state preparation circuit synthesis. The circuit is synthesized using at most $t_\mathrm{max}$ layers of CNOTs. All possible column additions on the symbolic check matrices are related via variables $c_{i,j}^t$, which encode all possible CNOTs in layer $t$. Starting from the target check matrix $H_X$ these constraints encode all possible valid circuits that prepare the logical $\ket{0}^{\otimes k}_L$ state.

Theorems & Definitions (6)

• Example 2.1
• Example 2.2
• Definition 2.3: Fault-tolerant state preparation paetznickFaulttolerantAncillaPreparation2013derksDesigningFaulttolerantCircuits2024
• Example 3.1
• Theorem 5.1
• proof