ShortCircuit: AlphaZero-Driven Circuit Design

TL;DR

This paper addresses the problem of generating compact AIGs from truth tables, a task with a doubly exponential search space. It introduces ShortCircuit, a transformer-based architecture augmented with an AlphaZero–style search to efficiently explore candidate AIGs via a learned policy and value function. The two-phase training regime—supervised pre-training followed by AlphaZero fine-tuning—enables generalization to unseen truth tables and scalable design discovery. Empirically, ShortCircuit achieves a $98\%$ success rate on 8-input truth tables and yields AIGs that are significantly smaller than those produced by ABC and other baselines, illustrating the potential of ML to revitalize logic synthesis and enable more efficient circuit designs. The approach lays groundwork for extending to multi-output AIGs and deeper integration with industrial EDA flows.

Abstract

Chip design relies heavily on generating Boolean circuits, such as AND-Inverter Graphs (AIGs), from functional descriptions like truth tables. This generation operation is a key process in logic synthesis, a primary chip design stage. While recent advances in deep learning have aimed to accelerate circuit design, these efforts have mostly focused on tasks other than synthesis, and traditional heuristic methods have plateaued. In this paper, we introduce ShortCircuit, a novel transformer-based architecture that leverages the structural properties of AIGs and performs efficient space exploration. Contrary to prior approaches attempting end-to-end generation of logic circuits using deep networks, ShortCircuit employs a two-phase process combining supervised with reinforcement learning to enhance generalization to unseen truth tables. We also propose an AlphaZero variant to handle the double exponentially large state space and the reward sparsity, enabling the discovery of near-optimal designs. To evaluate the generative performance of our model , we extract 500 truth tables from a set of 20 real-world circuits. ShortCircuit successfully generates AIGs for $98\%$ of the 8-input test truth tables, and outperforms the state-of-the-art logic synthesis tool, ABC, by $18.62\%$ in terms of circuits size.

Figures (7)

• Figure 1: Representation of an AIG, showing the truth table associated to each node.
• Figure 2: Truth table of each node appearing in the AIG from Fig. \ref{['fig:AIG']}
• Figure 3: ShortCircuit model takes as inputs a target truth table $T_\star{}$ and the truth tables of the already built nodes. It first appends a type-dependent positional encoding before going through several transformer layers. Then, the model is split into two heads respectively outputting a probability distribution over the next possible actions (policy module on the left), and a value reflecting the quality of the current inputs (value module on the right).
• Figure 4: We start data pre-processing by sorting the AIG nodes in topological order. Then, we identify the action types $\epsilon \in \{1, 2, 3, 4\}$ based on the edges. Next, we build the sequence of actions $\mathcal{A}$ and generate the global action tensor $\boldsymbol{A} = (\boldsymbol{A}_1, \boldsymbol{A}_2, \boldsymbol{A}_3,\boldsymbol{A}_4)$. We highlight the structure of $\boldsymbol{A}_3$, which contains a $1$ at entries $(1, 2)$ and $(6, 7)$ for the generation of $\wedge_5$ and $\wedge_8$ (actions $a_5$ and $a_8$).
• Figure 5: Average number of AND-nodes for the successfully generated AIGs across several baselines.