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Enhancing Quantum Memory Lifetime with Measurement-Free Local Error Correction and Reinforcement Learning

Mincheol Park, Nishad Maskara, Marcin Kalinowski, Mikhail D. Lukin

TL;DR

This work introduces measurement-free, local error correction (LEC) circuits built from faulty multi-qubit gates and optimizes them with reinforcement learning (RL) to enhance quantum memory lifetimes. By combining ancilla-based syndrome extraction with ancilla-controlled local error removal, and extending the operation set with hierarchical corrections, RL-LEC circuits outperform conventional LEC schemes in sub-threshold gate-error regimes across 2D toric code, 2D Ising, and 4D toric code, quantified via an effective code distance $D_{ m{eff}}$ that governs lifetime scaling. The study demonstrates two practical benefits: (i) hybrid decoding that reduces mid-circuit readouts in memory-preserving workflows, and (ii) dissipative preparation of topological phases using conditional transport of excitations. The framework adapts to different codes, gate sets, and error models, offering a scalable approach to near-term quantum memories and topological state engineering with locally constrained, RL-driven decoders.

Abstract

Reliable quantum computation requires systematic identification and correction of errors that occur and accumulate in quantum hardware. To diagnose and correct such errors, standard quantum error-correcting protocols utilize $\textit{global}$ error information across the system obtained by mid-circuit readout of ancillary qubits. We investigate circuit-level error-correcting protocols that are measurement-free and based on $\textit{local}$ error information. Such a local error correction (LEC) circuit consists of faulty multi-qubit gates to perform both syndrome extraction and ancilla-controlled error removal. We develop and implement a reinforcement learning framework that takes a fixed set of faulty gates as inputs and outputs an optimized LEC circuit. To evaluate this approach, we quantitatively characterize an extension of logical qubit lifetime by a noisy LEC circuit. For the 2D classical Ising model and 4D toric code, our optimized LEC circuit performs better at extending a memory lifetime compared to a conventional LEC circuit based on Toom's rule in a sub-threshold gate error regime. We further show that such circuits can be used to reduce the rate of mid-circuit readouts to preserve a 2D toric code memory. Finally, we discuss the application of the LEC protocol on dissipative preparation of quantum states with topological phases.

Enhancing Quantum Memory Lifetime with Measurement-Free Local Error Correction and Reinforcement Learning

TL;DR

This work introduces measurement-free, local error correction (LEC) circuits built from faulty multi-qubit gates and optimizes them with reinforcement learning (RL) to enhance quantum memory lifetimes. By combining ancilla-based syndrome extraction with ancilla-controlled local error removal, and extending the operation set with hierarchical corrections, RL-LEC circuits outperform conventional LEC schemes in sub-threshold gate-error regimes across 2D toric code, 2D Ising, and 4D toric code, quantified via an effective code distance that governs lifetime scaling. The study demonstrates two practical benefits: (i) hybrid decoding that reduces mid-circuit readouts in memory-preserving workflows, and (ii) dissipative preparation of topological phases using conditional transport of excitations. The framework adapts to different codes, gate sets, and error models, offering a scalable approach to near-term quantum memories and topological state engineering with locally constrained, RL-driven decoders.

Abstract

Reliable quantum computation requires systematic identification and correction of errors that occur and accumulate in quantum hardware. To diagnose and correct such errors, standard quantum error-correcting protocols utilize error information across the system obtained by mid-circuit readout of ancillary qubits. We investigate circuit-level error-correcting protocols that are measurement-free and based on error information. Such a local error correction (LEC) circuit consists of faulty multi-qubit gates to perform both syndrome extraction and ancilla-controlled error removal. We develop and implement a reinforcement learning framework that takes a fixed set of faulty gates as inputs and outputs an optimized LEC circuit. To evaluate this approach, we quantitatively characterize an extension of logical qubit lifetime by a noisy LEC circuit. For the 2D classical Ising model and 4D toric code, our optimized LEC circuit performs better at extending a memory lifetime compared to a conventional LEC circuit based on Toom's rule in a sub-threshold gate error regime. We further show that such circuits can be used to reduce the rate of mid-circuit readouts to preserve a 2D toric code memory. Finally, we discuss the application of the LEC protocol on dissipative preparation of quantum states with topological phases.
Paper Structure (30 sections, 7 equations, 17 figures, 6 tables, 2 algorithms)

This paper contains 30 sections, 7 equations, 17 figures, 6 tables, 2 algorithms.

Figures (17)

  • Figure 1: Overview of circuit-level local error correction (LEC) protocol and the reinforcement learning (RL) optimization framework. The LEC circuit is a sequence of local coherent quantum operations --- not including a mid-circuit projective readout of any qubit --- applied to data qubits (circle) and ancillas (triangle). It takes data qubits with errors (colored red) and initialized ancillas as input and moves errors of data qubits into ancillas. This local decoding can be repeated over multiple cycles with a finite number of ancillas by resetting them into the initialized ones. A reinforcement learning (RL) framework constructs an optimized LEC circuit by combining two types of "building block" operations, followed by corresponding coherent and independent reconfiguration of qubits. First, ancilla-based syndrome extraction operations enable the ancillas to measure and store syndrome information that indicates the existence of errors on neighboring data qubits. On the other hand, ancilla-controlled error removal operations provide local feedback operation controlled by ancillas onto data qubits to correct their errors. All these operations can be achieved experimentally within the state-of-the-art quantum processors, including the Rydberg atom arrays (see Appendix \ref{['appendix: exp']}).
  • Figure 2: Data qubits and stabilizers for each error-correcting code. Pauli $\hat{X}$ and $\hat{Z}$ operators on qubits at corresponding lattice positions are colored red and blue, respectively. Also, grey qubits denote a periodic boundary condition of a lattice. (a) In the 2D toric code lattice, data qubits live at edges. Stabilizer $\hat{A}_p$ and $\hat{B}_v$ are defined at each plaquette $p$ and vertex $v$, respectively, by the tensor product of four $\hat{Z}s$ and four $\hat{X}$s, respectively, on adjacent edges. (b) In the 2D Ising model lattice, data qubits live at plaquettes. Stabilizer $\hat{A}_v$ and $\hat{A}_h$ are defined at each edge by the tensor products of two $\hat{Z}$s on adjacent plaquettes. (c) In 4D toric code lattice, data qubits live at faces. Stabilizer $\hat{A}_e$ and $\hat{B}_c$ are defined at each edge $e$ and cube $c$, respectively, by the tensor products of six $\hat{Z}$s and $\hat{X}$s, respectively, on adjacent faces.
  • Figure 3: The gate-level implementation of syndrome extraction and error removal operation in each code. (a) Syndrome extraction operation using ancillas is a sequence of CNOT gates in parallel. An example of such a sequence with unit cells for 2D toric code is shown. Note that the CNOT gates are applied in the optimized order (see Appendix \ref{['appendix: QECC-implementation']}). (b) Error removal operation to reduce error density of data qubits controlled by ancillas is a single application of CCX or CCZ gates in parallel. An example of the simplest such operation with a unit cell for each code is shown. To remove $\hat{X}$ (or $\hat{Z}$) errors, CCX (or CCZ) gates are applied.
  • Figure 4: Uncorrectable error pattern by the simplest error removal operation in each code, as introduced in Fig. \ref{['fig:1A-2_CircuitOperations']}(b). (a) In 2D toric code, the given error removal operation removes only length-1 error chains that consist of a single $\hat{X}$ or $\hat{Z}$ error on a data qubit. However, error chains with more than one error are uncorrectable by the given operation. (b,c) In the 2D Ising model and 4D toric code, illustrated membrane-like error sheets bounded by parallel 1D syndrome lines that are periodic around the lattice are uncorrectable by the arbitrary repetition of Toom's rule error removal operation.
  • Figure 5: Unit cells of extended error removal operations for each code. To address the uncorrectable error patterns shown in Fig. \ref{['fig:1B_Uncorrectable']}, we hierarchically introduce new error removal operations. (a) In the 2D toric code, we include $d = N$ operations, for $N \le 3$, that can reduce length-$N$ chains into length-$(N-1)$ chains. (b) For the 2D Ising model and 4D toric code, we extend Toom's rule operation to Toom Sweep operations as generated by 90$^\circ$ rotations of the original Toom's rule operation. Additionally, we introduce $d=N$ operations, for $N \le 2$ in the 2D Ising model and for $N = 1$ and $(1,1)$ in 4D toric code, that can reduce width-$N$ sheets into width-$(N-1)$ sheets. Note that $d=(1,1)$ operation for 4D toric code can reduce width-$(1,1)$ sheets into width-1 sheets.
  • ...and 12 more figures