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Real-time Event Recognition of Long-distance Distributed Vibration Sensing with Knowledge Distillation and Hardware Acceleration

Zhongyao Luo, Hao Wu, Zhao Ge, Ming Tang

TL;DR

The paper tackles the bottleneck of real-time event recognition in long-distance distributed vibration sensing (DVS) by combining a lightweight CNN with logits-based knowledge distillation from a larger ResNet-34 teacher and a novel FPGA-based acceleration pipeline. The KD approach enhances generalization of a compact model, achieving 95.39% test accuracy and 99.61% validation accuracy, dramatically closing the gap with the larger teacher. The hardware contribution replaces MAC-based computation with a shift-add structure, uses shift-parameter quantization and on-chip encoding to minimize on-chip storage, and adopts a pipelined, layer-wise architecture with activation buffering to maximize throughput. The FPGA design delivers 0.083 ms inference per spatial-temporal sample, enabling real-time processing over ~38 km of fiber and outperforming GPU and CPU baselines, thus making DVS-based IoT deployments more practical and scalable.

Abstract

Fiber-optic sensing, especially distributed optical fiber vibration (DVS) sensing, is gaining importance in internet of things (IoT) applications, such as industrial safety monitoring and intrusion detection. Despite their wide application, existing post-processing methods that rely on deep learning models for event recognition in DVS systems face challenges with real-time processing of large sample data volumes, particularly in long-distance applications. To address this issue, we propose to use a four-layer convolutional neural network (CNN) with ResNet as the teacher model for knowledge distillation. This results in a significant improvement in accuracy, from 83.41% to 95.39%, on data from previously untrained environments. Additionally, we propose a novel hardware design based on field-programmable gate arrays (FPGA) to further accelerate model inference. This design replaces multiplication with binary shift operations and quantizes model weights, enabling high parallelism and low latency. Our implementation achieves an inference time of 0.083 ms for a spatial-temporal sample covering a 12.5 m fiber length and 0.256 s time frame. This performance enables real-time signal processing over approximately 38.55 km of fiber, about $2.14\times$ the capability of an Nvidia GTX 4090 GPU. The proposed method greatly enhances the efficiency of vibration pattern recognition, promoting the use of DVS as a smart IoT system. The data and code are available at https://github.com/HUST-IOF/Efficient-DVS.

Real-time Event Recognition of Long-distance Distributed Vibration Sensing with Knowledge Distillation and Hardware Acceleration

TL;DR

The paper tackles the bottleneck of real-time event recognition in long-distance distributed vibration sensing (DVS) by combining a lightweight CNN with logits-based knowledge distillation from a larger ResNet-34 teacher and a novel FPGA-based acceleration pipeline. The KD approach enhances generalization of a compact model, achieving 95.39% test accuracy and 99.61% validation accuracy, dramatically closing the gap with the larger teacher. The hardware contribution replaces MAC-based computation with a shift-add structure, uses shift-parameter quantization and on-chip encoding to minimize on-chip storage, and adopts a pipelined, layer-wise architecture with activation buffering to maximize throughput. The FPGA design delivers 0.083 ms inference per spatial-temporal sample, enabling real-time processing over ~38 km of fiber and outperforming GPU and CPU baselines, thus making DVS-based IoT deployments more practical and scalable.

Abstract

Fiber-optic sensing, especially distributed optical fiber vibration (DVS) sensing, is gaining importance in internet of things (IoT) applications, such as industrial safety monitoring and intrusion detection. Despite their wide application, existing post-processing methods that rely on deep learning models for event recognition in DVS systems face challenges with real-time processing of large sample data volumes, particularly in long-distance applications. To address this issue, we propose to use a four-layer convolutional neural network (CNN) with ResNet as the teacher model for knowledge distillation. This results in a significant improvement in accuracy, from 83.41% to 95.39%, on data from previously untrained environments. Additionally, we propose a novel hardware design based on field-programmable gate arrays (FPGA) to further accelerate model inference. This design replaces multiplication with binary shift operations and quantizes model weights, enabling high parallelism and low latency. Our implementation achieves an inference time of 0.083 ms for a spatial-temporal sample covering a 12.5 m fiber length and 0.256 s time frame. This performance enables real-time signal processing over approximately 38.55 km of fiber, about the capability of an Nvidia GTX 4090 GPU. The proposed method greatly enhances the efficiency of vibration pattern recognition, promoting the use of DVS as a smart IoT system. The data and code are available at https://github.com/HUST-IOF/Efficient-DVS.
Paper Structure (13 sections, 6 equations, 10 figures, 6 tables, 2 algorithms)

This paper contains 13 sections, 6 equations, 10 figures, 6 tables, 2 algorithms.

Table of Contents

  1. Introduction
  2. Method
  3. Knowledge Distillation based on logits
  4. FPGA-Based Hardware Acceleration
  5. Parallel Architecture
  6. Activation Buffering
  7. Shift-Add Structure
  8. Shift Parameter Quantization
  9. Encoding
  10. Experiment
  11. Performance evaluation
  12. Implementation Evaluation
  13. Conclusion

Figures (10)

  • Figure 1: Schematic of DVS system. NLL: narrow linewidth laser, SOA: semiconductor optical amplifier, AWG: arbitrary waveform generator, EDFA: erbium-doped fiber amplifier, FUT: fiber under test, APD: avalanche photodetector, DAQ: data acquisition card.
  • Figure 2: Schematic of KD process.
  • Figure 3: Schematic of pipelined structure.
  • Figure 4: Line buffer structure.
  • Figure 5: Shift-add and MAC structure.
  • ...and 5 more figures