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Optimizing quantum error correction protocols with erasure qubits

Shouzhen Gu, Yotam Vaknin, Alex Retzker, Aleksander Kubica

TL;DR

The paper evaluates quantum error correction with erasure qubits, focusing on the surface code as a quantum memory and varying erasure-check schedules to map the correctable region and subthreshold scaling. It introduces an approximate erasure-to-stabilizer decoding framework and analyzes architecture-independent results alongside superconducting implementations, notably dual-rail qubits, compared to conventional transmons. Key findings show erasure qubits can outperform standard qubits under practical timing and noise-bias conditions, with the 4 EC schedule offering advantages in highly erasure-biased regimes and XZZX codes benefiting from biased noise; however, imperfect erasure resets and measurement noise can reduce gains, which can be mitigated by selective one-way resets. The work provides a practical path toward reducing QEC overhead and informs design choices for hardware platforms, decoding strategies, and code selection in the presence of erasures.

Abstract

Erasure qubits offer a promising avenue toward reducing the overhead of quantum error correction (QEC) protocols. However, they require additional operations, such as erasure checks, that may add extra noise and increase runtime of QEC protocols. To assess the benefits provided by erasure qubits, we focus on the performance of the surface code as a quantum memory. In particular, we analyze various erasure check schedules, find the correctable regions in the phase space of error parameters and probe the subthreshold scaling of the logical error rate. We then consider a realization of erasure qubits in the superconducting hardware architectures via dual-rail qubits. We use the standard transmon-based implementation of the surface code as the performance benchmark. Our results indicate that QEC protocols with erasure qubits can outperform the ones with state-of-the-art transmons, even in the absence of precise information about the locations of erasure errors.

Optimizing quantum error correction protocols with erasure qubits

TL;DR

The paper evaluates quantum error correction with erasure qubits, focusing on the surface code as a quantum memory and varying erasure-check schedules to map the correctable region and subthreshold scaling. It introduces an approximate erasure-to-stabilizer decoding framework and analyzes architecture-independent results alongside superconducting implementations, notably dual-rail qubits, compared to conventional transmons. Key findings show erasure qubits can outperform standard qubits under practical timing and noise-bias conditions, with the 4 EC schedule offering advantages in highly erasure-biased regimes and XZZX codes benefiting from biased noise; however, imperfect erasure resets and measurement noise can reduce gains, which can be mitigated by selective one-way resets. The work provides a practical path toward reducing QEC overhead and informs design choices for hardware platforms, decoding strategies, and code selection in the presence of erasures.

Abstract

Erasure qubits offer a promising avenue toward reducing the overhead of quantum error correction (QEC) protocols. However, they require additional operations, such as erasure checks, that may add extra noise and increase runtime of QEC protocols. To assess the benefits provided by erasure qubits, we focus on the performance of the surface code as a quantum memory. In particular, we analyze various erasure check schedules, find the correctable regions in the phase space of error parameters and probe the subthreshold scaling of the logical error rate. We then consider a realization of erasure qubits in the superconducting hardware architectures via dual-rail qubits. We use the standard transmon-based implementation of the surface code as the performance benchmark. Our results indicate that QEC protocols with erasure qubits can outperform the ones with state-of-the-art transmons, even in the absence of precise information about the locations of erasure errors.
Paper Structure (26 sections, 41 equations, 15 figures, 1 table, 1 algorithm)

This paper contains 26 sections, 41 equations, 15 figures, 1 table, 1 algorithm.

Figures (15)

  • Figure 1: (a) The surface code with code distance $d=5$. The ancilla qubits (green dots) are used to measure stabilizer checks on the adjacent data qubits (black dots). Grey and white regions are associated with $X$ and $Z$ stabilizers, respectively. (b) Syndrome extraction circuit for the surface code, where the locations of possible ECs with reset are labeled by $A$, $B$, $C$, and $D$.
  • Figure 2: (a) A segment $s$ of the qubit $q$ in an erasure circuit $C_E$. (b) The corresponding portion of the converted stabilizer circuit $C$. Depolarizing channels are placed at spacetime locations $\mathcal{F}_i$ according to Algorithm \ref{['alg:approxconversion']}.
  • Figure 3: Comparison of the exact and approximate conversion schemes for decoding. We plot the performance for the (a) 4 EC and (b) 2 EC schedules. The solid lines correspond to approximate conversion of the erasure circuit to a stabilizer circuit; the dashed lines correspond to the exact method. The logical error rates are plotted for different values of $x$ along the line $(e, p, q) = (x, x/10, x)$.
  • Figure 4: The correctable region in the $(e, p, q)$ phase space for the surface code with erasure qubits and EC schedules with: (a) 4 ECs, (b) 2 ECs, and (c) 1 EC, where $e$, $p$, and $q$ denote the erasure, Pauli, and measurement error rates, respectively. The meshes of the surfaces are aligned with constant values of $q$. Cross sections of the threshold surfaces in the $(e, p)$ plane for the different EC schedules when: (d) $q=0$, (e) $q=0.005$, and (f) $q=0.01$. The shaded regions indicate parameter regimes where only one schedule is below threshold. The dashed line corresponds to an optimistic scenario where ECs and reset operations do not cause additional errors. The dotted line is obtained from a scheme with noiseless reset operations but no ECs, giving an upper bound for schemes that do not use information about the locations of erasures.
  • Figure 5: The subthreshold scaling of the logical error rate according to the ansatz of Eq. \ref{['eq:subthreshold_ansatz']}. (a) We test logical error rates along the orange line $\ell$ in the $(e, p, q)$ phase space. The orange dot is at the intersection of $\ell$ with the threshold surface, giving the threshold value $x^*$. (b) The logical error rates with increasing distance for various values of $x$ along $\ell$, shown in the different colors. To fit the data we use the numerical ansatz $p_L = a\left(x/x^*\right)^{\alpha d}$ with fitting parameters $a$, $\alpha$. (c) Values of $\alpha$ for various noise biases in the different EC schedules.
  • ...and 10 more figures