Table of Contents
Fetching ...

Autonomous Bootstrapping of Quantum Dot Devices

Anton Zubchenko, Danielle Middlebrooks, Torbjørn Rasmussen, Lara Lausen, Ferdinand Kuemmeth, Anasua Chatterjee, Justyna P. Zwolak

TL;DR

This paper tackles the scalability barrier in tuning gate-defined quantum-dot arrays by introducing an autonomous bootstrapping protocol that drives a cooled device into a ready-to-tune regime using physics-based heuristics and rf reflectometry-based sensing. The modular workflow covers preparation, diagnostics, channel definition, sensor setup, and coarse tuning, culminating in reliable DD state preparation within under 8 minutes and high coarse-tuning success. The approach yields an 86.5% bootstrapping success over 89 trials and around 96% coarse-tuning success, establishing a practical baseline for automated QD initialization and benchmarking against ML-heavy alternatives. The results support cross-platform applicability and chart a path toward scalable, low-intervention initialization of large QD arrays across materials, with future work focusing on data quality, integration with device virtualization, and multi-array extension.

Abstract

Semiconductor quantum dots (QDs) are a promising platform for multiple different qubit implementations, all of which are voltage controlled by programmable gate electrodes. However, as the QD arrays grow in size and complexity, tuning procedures that can fully autonomously handle the increasing number of control parameters are becoming essential for enabling scalability. We propose a bootstrapping algorithm for initializing a depletion-mode QD device in preparation for subsequent phases of tuning. During bootstrapping, the QD device functionality is validated, all gates are characterized, and the QD charge sensor is made operational. We demonstrate the bootstrapping protocol in conjunction with a coarse-tuning module, showing that the combined algorithm can efficiently and reliably take a cooled-down QD device to a desired global-state configuration in under 8 min with a success rate of 96 %. Finally, by following heuristic approaches to QD device initialization and combining the efficient ray-based measurement with the rapid radio-frequency reflectometry measurements, the proposed algorithm establishes a reference in terms of performance, reliability, and efficiency against which alternative algorithms can be benchmarked.

Autonomous Bootstrapping of Quantum Dot Devices

TL;DR

This paper tackles the scalability barrier in tuning gate-defined quantum-dot arrays by introducing an autonomous bootstrapping protocol that drives a cooled device into a ready-to-tune regime using physics-based heuristics and rf reflectometry-based sensing. The modular workflow covers preparation, diagnostics, channel definition, sensor setup, and coarse tuning, culminating in reliable DD state preparation within under 8 minutes and high coarse-tuning success. The approach yields an 86.5% bootstrapping success over 89 trials and around 96% coarse-tuning success, establishing a practical baseline for automated QD initialization and benchmarking against ML-heavy alternatives. The results support cross-platform applicability and chart a path toward scalable, low-intervention initialization of large QD arrays across materials, with future work focusing on data quality, integration with device virtualization, and multi-array extension.

Abstract

Semiconductor quantum dots (QDs) are a promising platform for multiple different qubit implementations, all of which are voltage controlled by programmable gate electrodes. However, as the QD arrays grow in size and complexity, tuning procedures that can fully autonomously handle the increasing number of control parameters are becoming essential for enabling scalability. We propose a bootstrapping algorithm for initializing a depletion-mode QD device in preparation for subsequent phases of tuning. During bootstrapping, the QD device functionality is validated, all gates are characterized, and the QD charge sensor is made operational. We demonstrate the bootstrapping protocol in conjunction with a coarse-tuning module, showing that the combined algorithm can efficiently and reliably take a cooled-down QD device to a desired global-state configuration in under 8 min with a success rate of 96 %. Finally, by following heuristic approaches to QD device initialization and combining the efficient ray-based measurement with the rapid radio-frequency reflectometry measurements, the proposed algorithm establishes a reference in terms of performance, reliability, and efficiency against which alternative algorithms can be benchmarked.
Paper Structure (11 sections, 4 equations, 3 figures, 1 table)

This paper contains 11 sections, 4 equations, 3 figures, 1 table.

Figures (3)

  • Figure 1: (a) A scanning electron micrograph (SEM) of a gate-defined, depletion-mode GaAs/Al$_{0.36}$Ga$_{0.64}$As device used to demonstrate the bootstrapping protocol. The gates are labeled as follows: P$_{\rm L}$, P$_{\rm R}$, and SP for the left, right, and sensor plunger, respectively; OB$_{\rm L}$, OB$_{\rm R}$, B, SB$_{\rm T}$, and SB$_{\rm B}$ for the outer left, outer right, middle, sensor top, and sensor bottom barrier, respectively; and BB for the backbone gate. (b) A conceptual overview of the tuning protocol. The bootstrapping process, depicted in steps 1A--1C, is followed by the device state estimation module (DSE; step 2A) Zwolak20-AQDZiegler22-TRA, and (optional) gate-voltage adjustment (step 2B). Steps 2 and 3 are interleaved with an optimization protocol and, if necessary, repeated characterization and reinitialization, to iteratively adjust voltages until the DSE module declares the device to be in a double-dot (DD) state. (c) The procedural flow of the bootstrapping algorithm. The algorithm begins with the preparatory stage and setting the BB gate (teal box), followed by the device diagnostics and characterization of the finger gates stage (light blue box), defining of the sensor-QD- and qubit-QD-channels stage (dark blue box), a configuration of the outer barrier gates (purple box), and the sensor-tuning stage (pink box).
  • Figure 2: (a) SEMs highlighting finger gates characterized during the bootstrapping process. (b) Sample voltage versus current plots for the finger gates depicted in panel (a). The OB$_{\rm L}$ gate measures Coulomb oscillations due to the formation of a QD between OB$_{\rm L}$ and OB$_{\rm R}$. The BB, OB$_{\rm R}$, SB$_{\rm T}$, and SB$_{\rm B}$ gates are set as a result of ray-based (rb) measurement. SB$_{\rm T}$ versus SB$_{\rm B}$ measures Coulomb oscillations due to setting sensor-QD barriers. The BB versus OB$_{\rm R}$ rb measurement analyzes the current trace and finds the current saturation point: the gates are then parked at the voltage at which saturation is reached. The palette corresponds to the colors used to highlight gates in panel (a). (c) Consistency plots showing the mean values and standard deviations for the characteristics of interest, averaged over $N=89$ test bootstrapping runs. For gates OB$_{\rm L}$, P$_{\rm L}$, B, P$_{\rm R}$, OB$_{\rm R}$, and SP, the pinch-offs and saturation values are collected. For SP, BB, OB$_{\rm R}$, SB$_{\rm T}$, and SB$_{\rm B}$, the parking-value statistics are collected. For the SP, the parking value corresponds to the position on the most sensitive Coulomb peak position found with rf reflectometry. The final configuration for P$_{\rm L}$, B, and P$_{\rm R}$ are established during the coarse-tuning stage. The error bars indicate one standard deviation. However, their respective pinch-offs and saturation points are used to determine the starting position for the initialization of the DSE module.
  • Figure 3: (a) An overview of the sample run of the autotuning protocol implemented with active feedback in the larger space of plunger gates $(V_{\rm P_R}, V_{\rm P_L})$. (b) A close-up of a charge stability diagram showing a sample 12-step path of the coarse-tuning module with active feedback in the space of plunger gates $(V_{\rm P_R}, V_{\rm P_L})$. The arrows and the intensity of the color indicate the progress of the autotuner (dark to light). (c) The measured raw scans in the space of plunger gates $(V_{\rm P_R}, V_{\rm P_L})$ showing data available to the DSE module for six selected steps along the path shown in panel (a). The p$_{DD}$ corresponds to the evaluated likelihood of the DD regime. (d) The DD likelihood of initial and final points. (e) The distribution of path lengths across the 46 test runs.