LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits

TL;DR

LaMAGIC addresses automated analog circuit design by enabling one-shot topology generation from specifications using a supervised finetuned language model. It analyzes multiple graph-aligned input/output formulations (canonical, adjacency-matrix, and float-input variants) and trains a Flan-T5-based encoder-decoder with domain tokens and vertex-order permutation augmentation to handle circuit graphs as sequences. The approach achieves up to a $0.96$ success rate under a tolerance of $t=0.01$ and demonstrates scalable transferability to 6-component circuits, with float-input adjacency and PM formulations offering strong robustness. This work establishes a foundation for language-model–driven graph generation in analog circuit design and suggests pathways to broader automatic design tasks with complex topologies.

Abstract

In the realm of electronic and electrical engineering, automation of analog circuit is increasingly vital given the complexity and customized requirements of modern applications. However, existing methods only develop search-based algorithms that require many simulation iterations to design a custom circuit topology, which is usually a time-consuming process. To this end, we introduce LaMAGIC, a pioneering language model-based topology generation model that leverages supervised finetuning for automated analog circuit design. LaMAGIC can efficiently generate an optimized circuit design from the custom specification in a single pass. Our approach involves a meticulous development and analysis of various input and output formulations for circuit. These formulations can ensure canonical representations of circuits and align with the autoregressive nature of LMs to effectively addressing the challenges of representing analog circuits as graphs. The experimental results show that LaMAGIC achieves a success rate of up to 96\% under a strict tolerance of 0.01. We also examine the scalability and adaptability of LaMAGIC, specifically testing its performance on more complex circuits. Our findings reveal the enhanced effectiveness of our adjacency matrix-based circuit formulation with floating-point input, suggesting its suitability for handling intricate circuit designs. This research not only demonstrates the potential of language models in graph generation, but also builds a foundational framework for future explorations in automated analog circuit design.

Figures (7)

• Figure 1: The scenario comparison between manual analog circuit design, previous RL search method fan2021specification, and our language model LaMAGIC.
• Figure 2: (a) An example power converter circuit and (b) its corresponding hypergraph representation.
• Figure 3: A circuit example from Figure \ref{['fig:example circuit']} representing by the naïve formulation, our canonical formulation, canonical formulation + new duty cycle representation, adjacency-matrix based formulation, and float-input adjacency based matrix formulation for edge generation task. In the top three formulation, we simply place the vertex-related description from LM input to output to achieve topology generation task. In adjacency-matrix based formulation, we employ T5-styled masked language modeling raffel2020exploring to perform circuit generation. For topology generation, we further mask the vertex order in LM input and place it to output.
• Figure 4: Success rates of models trained with different circuit formulations using 3, 4, 5-component circuits for edge generation and topology generation task. Circuit formulations include (1) the naïve formulation (NF), (2) the canonical form (CF), (3) the canonical form with one-hot-encoding-based duty cycle selection (CFDC), (4) the adjacency-matrix-based formulation with pure text input (PM), and (5) the adjacency-matrix-based formulation with float input (FM).
• Figure 5: Success rates of models finetuned with different circuit formulations using 500, 1000, and 2000 6-component circuits.