An Evaluation of Continual Learning for Advanced Node Semiconductor Defect Inspection

TL;DR

The paper tackles the challenge of evolving semiconductor defects and catastrophic forgetting in defect inspection by introducing a task-agnostic meta-learning framework that incrementally adds defect classes. It formalizes learning progress with $T_p$, $F_p^q$, and $\mathcal{T}_p^q$ and implements the approach on a Faster-RCNN backbone, evaluated on resist-wafer SEM data from ADI and AEI. Through three case studies, it demonstrates that incremental learning preserves or matches the performance of models trained on all classes while reducing forgetting, offering advantages over conventional fine-tuning. This strategy provides a storage-efficient, scalable path for robust defect inspection in High-Volume Manufacturing environments.

Abstract

Deep learning-based semiconductor defect inspection has gained traction in recent years, offering a powerful and versatile approach that provides high accuracy, adaptability, and efficiency in detecting and classifying nano-scale defects. However, semiconductor manufacturing processes are continually evolving, leading to the emergence of new types of defects over time. This presents a significant challenge for conventional supervised defect detectors, as they may suffer from catastrophic forgetting when trained on new defect datasets, potentially compromising performance on previously learned tasks. An alternative approach involves the constant storage of previously trained datasets alongside pre-trained model versions, which can be utilized for (re-)training from scratch or fine-tuning whenever encountering a new defect dataset. However, adhering to such a storage template is impractical in terms of size, particularly when considering High-Volume Manufacturing (HVM). Additionally, semiconductor defect datasets, especially those encompassing stochastic defects, are often limited and expensive to obtain, thus lacking sufficient representation of the entire universal set of defectivity. This work introduces a task-agnostic, meta-learning approach aimed at addressing this challenge, which enables the incremental addition of new defect classes and scales to create a more robust and generalized model for semiconductor defect inspection. We have benchmarked our approach using real resist-wafer SEM (Scanning Electron Microscopy) datasets for two process steps, ADI and AEI, demonstrating its superior performance compared to conventional supervised training methods.

Figures (4)

• Figure 1: SEM images with a) ADI defects and b) AEI defects
• Figure 2: Comparison between (a) proposed incremental learning and (b) conventional fine-tuning method.
• Figure 3: (a) Proposed incremental learning vs (b) conventional fine-tuning method for incremental learning of AEI defects, after training across the ADI dataset.
• Figure 4: Upper row: Model trained for defect detection on all classes at once. Middle row: Model obtained after incremental training on task $T_7^3$. Lower row: Model obtained after training on task $F_7^3$ Defect types (ground truth), left to right: Microbridge, Gap, Bridge, Thin bridge, Multi bridge non-horizontal.

Theorems & Definitions (3)

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