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Circuits and Backdoors: Five Shades of the SETH

Michael Lampis

TL;DR

The paper develops a structured framework that classifies a spectrum of SETH-based hypotheses into five natural equivalence classes, revealing when brute-force hardness transfers across problems via modulators, backdoors, and circuit-depth restrictions. It leverages Barrington's theorem, modulator-to-width/depth concepts, and backdoor reductions to relate SAT/Max-SAT, circuit satisfiability, and graph problems, yielding precise equivalences for problems like Independent Set across cluster, cograph, block, and interval graphs. The authors provide characteristic complete problems for each class and demonstrate LD-C-SETH equivalences in several natural applications, such as coloring and independent set parameterized by vertex-deletion distance. This hierarchy clarifies which lower bounds are plausible under less-than-SETH assumptions and connects fine-grained complexity with classical complexity classes, offering a roadmap for classifying a broad range of SETH-based lower bounds. Overall, the work advances a structurally rich program to understand the relative hardness of fine-grained parameterized problems and points to future directions for populating the hierarchy with further problems and hypotheses.

Abstract

The Strong Exponential Time Hypothesis (SETH) is a standard assumption in (fine-grained) parameterized complexity and many tight lower bounds are based on it. We consider a number of reasonable weakenings of the SETH, with sources from (i) circuit complexity (ii) backdoors for SAT-solving (iii) graph width parameters and (iv) weighted satisfiability problems. Our goal is to arrive at formulations which are simultaneously more plausible as hypotheses, but also capture interesting and robust notions of complexity. Using several tools from classical complexity theory we are able to consolidate these numerous hypotheses into a hierarchy of five main equivalence classes of increasing solidity. This framework serves as a step towards structurally classifying a variety of SETH-based lower bounds into intermediate equivalence classes. To illustrate the applicability of our framework, for each of our classes we give at least one (non-SAT) problem which is equivalent to the class as a characteristic example application. As our main showcase, we consider a natural parameterization of Independent Set by vertex deletion distance from several standard graph classes. We provide precise characterizations of the difficulty of breaking such bounds, in particular proving that obtaining $(2-\varepsilon)^kn^{O(1)}$ time algorithms for Cograph$+kv$ or Block$+kv$ graphs is equivalent to obtaining a fast satisfiability algorithm for circuits of depth $\varepsilon n$; while solving the weighted version for Interval$+kv$ graphs is equivalent to the (seemingly) harder problem of obtaining a fast satisfiability algorithm for SAT parameterized by a 2-SAT backdoor.

Circuits and Backdoors: Five Shades of the SETH

TL;DR

The paper develops a structured framework that classifies a spectrum of SETH-based hypotheses into five natural equivalence classes, revealing when brute-force hardness transfers across problems via modulators, backdoors, and circuit-depth restrictions. It leverages Barrington's theorem, modulator-to-width/depth concepts, and backdoor reductions to relate SAT/Max-SAT, circuit satisfiability, and graph problems, yielding precise equivalences for problems like Independent Set across cluster, cograph, block, and interval graphs. The authors provide characteristic complete problems for each class and demonstrate LD-C-SETH equivalences in several natural applications, such as coloring and independent set parameterized by vertex-deletion distance. This hierarchy clarifies which lower bounds are plausible under less-than-SETH assumptions and connects fine-grained complexity with classical complexity classes, offering a roadmap for classifying a broad range of SETH-based lower bounds. Overall, the work advances a structurally rich program to understand the relative hardness of fine-grained parameterized problems and points to future directions for populating the hierarchy with further problems and hypotheses.

Abstract

The Strong Exponential Time Hypothesis (SETH) is a standard assumption in (fine-grained) parameterized complexity and many tight lower bounds are based on it. We consider a number of reasonable weakenings of the SETH, with sources from (i) circuit complexity (ii) backdoors for SAT-solving (iii) graph width parameters and (iv) weighted satisfiability problems. Our goal is to arrive at formulations which are simultaneously more plausible as hypotheses, but also capture interesting and robust notions of complexity. Using several tools from classical complexity theory we are able to consolidate these numerous hypotheses into a hierarchy of five main equivalence classes of increasing solidity. This framework serves as a step towards structurally classifying a variety of SETH-based lower bounds into intermediate equivalence classes. To illustrate the applicability of our framework, for each of our classes we give at least one (non-SAT) problem which is equivalent to the class as a characteristic example application. As our main showcase, we consider a natural parameterization of Independent Set by vertex deletion distance from several standard graph classes. We provide precise characterizations of the difficulty of breaking such bounds, in particular proving that obtaining time algorithms for Cograph or Block graphs is equivalent to obtaining a fast satisfiability algorithm for circuits of depth ; while solving the weighted version for Interval graphs is equivalent to the (seemingly) harder problem of obtaining a fast satisfiability algorithm for SAT parameterized by a 2-SAT backdoor.
Paper Structure (43 sections, 42 theorems, 3 figures)

This paper contains 43 sections, 42 theorems, 3 figures.

Key Result

Theorem 1

Given an integer $n$ it is possible to construct in time polynomial in $n$ bounded fan-in boolean circuits with $n^2$ inputs, $O(n)$ outputs, size $n^{O(1)}$ and depth $O(\log n)$ solving the following problems: (i) computing the maximum of $n$ integers of $n$ bits each (ii) computing the sum of $n$

Figures (3)

  • Figure 1: Summary of results. We identify five main equivalence classes, with arrows indicating implication, that is, pointing to weaker hypotheses. From bottom to top the five classes are problems equivalent to the SETH; the SETH for Max-SAT; the SETH for circuits of linear depth; the SETH for 2-SAT backdoors; and the SETH for arbitrary circuits. The figure also shows some connections with related hypotheses. Full definitions are given in \ref{['sec:hypo']}.
  • Figure 2: Summary of our results for (Weighted) Independent Set parameterized by vertex deletion distance to four graph classes: block, cluster, interval graphs, and cographs. Arrows indicate implication and a problem name indicates the hypothesis that brute-force is inevitable for this case. We consider unweighted versions (IS), unary weighted (WIS) and binary weighted (BinWIS).
  • Figure 3: Example of the construction of \ref{['lem:interval-gadget']}. Gray intervals have weight $1$, solid black intervals weight $2$, and empty intervals weight $3$. The intervals are annotated with the truth assignment of their line, for the active variables of their bundle ($x_1,x_2$ for the first two bundles, $x_1,x_3$ for the next two, and $x_4,x_3$ for the last one). The optimal solution is supposed to collect weight $2$ per bundle, plus an extra amount equal to the rank of the selected interval in the last bundle. The first new variable gadget allows us to switch between $00$ and $01$ (similarly $10$ and $11$) without cost, as we forget variable $x_2$. The flip gadget switches the ranks of $01$ and $10$, allowing us to use a new variable gadget to forget $x_1$.

Theorems & Definitions (46)

  • Theorem 1
  • Theorem 2
  • Corollary 4
  • Theorem 5
  • Theorem 6
  • Lemma 7
  • Definition 8
  • Theorem 9
  • Lemma 10
  • Lemma 11
  • ...and 36 more