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iMIV: in-Memory Integrity Verification for NVM

Rajat Jain, Aravinda Prasad, Sreenivas Subramoney, Arkaprava Basu

TL;DR

Data remanence in non-volatile memory enables confidentiality and integrity threats that challenge traditional CME/SMAC/BMT approaches. iMIV relocates memory-intensive BMT updates to a per-DIMMs Trusted IVE on the NVDIMM, while retaining CME/SMAC in the memory controller, and introduces a split BMT cache and pipelined updates to drastically reduce off-chip data movement. The approach achieves strong security guarantees with significantly lower overheads (average around 55% vs 205% baseline) and scales across multiple NVDIMMs, delivering faster recovery and reduced energy use, especially under bandwidth-constrained NVM. The work demonstrates competitive performance against prior secure-NVM schemes and provides practical design insights for secure, crash-resilient, and scalable NVM architectures.

Abstract

Non-volatile Memory (NVM) could bridge the gap between memory and storage. However, NVMs are susceptible to data remanence attacks. Thus, multiple security metadata must persist along with the data to protect the confidentiality and integrity of NVM-resident data. Persisting Bonsai Merkel Tree (BMT) nodes, critical for data integrity, can add significant overheads due to need to write large amounts of metadata off-chip to the bandwidth-constrained NVMs. We propose iMIV for low-overhead, fine-grained integrity verification through in-memory computing. We argue that memory-intensive integrity verification operations (BMT updates and verification) should be employed close to the NVM to limit off-chip data movement. We design iMIV based on typical NVDIMM designs that have an onboard logic chip with a trusted encryption engine, separate from the untrusted storage media. iMIV reduces the performance overheads from 205% to 55% when integrity verification operations are offloaded to NVM compared to when all the security operations are employed at the memory controller.

iMIV: in-Memory Integrity Verification for NVM

TL;DR

Data remanence in non-volatile memory enables confidentiality and integrity threats that challenge traditional CME/SMAC/BMT approaches. iMIV relocates memory-intensive BMT updates to a per-DIMMs Trusted IVE on the NVDIMM, while retaining CME/SMAC in the memory controller, and introduces a split BMT cache and pipelined updates to drastically reduce off-chip data movement. The approach achieves strong security guarantees with significantly lower overheads (average around 55% vs 205% baseline) and scales across multiple NVDIMMs, delivering faster recovery and reduced energy use, especially under bandwidth-constrained NVM. The work demonstrates competitive performance against prior secure-NVM schemes and provides practical design insights for secure, crash-resilient, and scalable NVM architectures.

Abstract

Non-volatile Memory (NVM) could bridge the gap between memory and storage. However, NVMs are susceptible to data remanence attacks. Thus, multiple security metadata must persist along with the data to protect the confidentiality and integrity of NVM-resident data. Persisting Bonsai Merkel Tree (BMT) nodes, critical for data integrity, can add significant overheads due to need to write large amounts of metadata off-chip to the bandwidth-constrained NVMs. We propose iMIV for low-overhead, fine-grained integrity verification through in-memory computing. We argue that memory-intensive integrity verification operations (BMT updates and verification) should be employed close to the NVM to limit off-chip data movement. We design iMIV based on typical NVDIMM designs that have an onboard logic chip with a trusted encryption engine, separate from the untrusted storage media. iMIV reduces the performance overheads from 205% to 55% when integrity verification operations are offloaded to NVM compared to when all the security operations are employed at the memory controller.
Paper Structure (28 sections, 12 figures, 5 tables)

This paper contains 28 sections, 12 figures, 5 tables.

Table of Contents

  1. introduction
  2. Background
  3. NVM security guarantees
  4. Threat model and trusted computing base
  5. Security guarantees and associated constraints
  6. Crash consistency in secure NVM
  7. Bottleneck analysis, key insights and ideas
  8. Key ideas
  9. Design and Implementation of iMIV
  10. Encryption Engine (EE)
  11. Integrity verification engine (IVE) on NVDIMM
  12. Efficient BMT updates
  13. Putting it together: End-to-end flow for a write request
  14. Attack mitigation, recovery & cost analysis
  15. Security analysis and attacks mitigation
  16. ...and 13 more sections

Figures (12)

  • Figure 1: Image on top is from Intel's Hotchips 2019 presentation that depicts the Optane NVDIMM's internals with an on-DIMM encryption engineoptane-hotchips. The bottom image shows a real NVDIMM with logic units and untrusted storage media optane_chip_diagram
  • Figure 2: (a) Counter-mode encryption and (b) 2-array BMT
  • Figure 3: Threat Model and TCB under consideration.
  • Figure 4: Impact of security metadata computation and persistence on NVM-aware workloads.
  • Figure 5: Contribution of each element of security tuple to off-chip data movement.
  • ...and 7 more figures