Accelerating MRI Uncertainty Estimation with Mask-based Bayesian Neural Network
Zehuan Zhang, Matej Genci, Hongxiang Fan, Andreas Wetscherek, Wayne Luk
TL;DR
The paper addresses the need for calibrated uncertainty in MRI-based adaptive radiotherapy by converting IVIM-NET into a hardware-friendly mask-based BayesNN (uIVIM-NET) and implementing an FPGA accelerator with mask-zero skipping and batch-level processing. The core idea is to remove runtime randomness while retaining uncertainty estimates, enabling real-time, energy-efficient MRI analysis. The proposed algorithm–hardware co-design demonstrates strong performance, achieving substantial speedups over CPU/GPU baselines and improving energy efficiency, with uncertainty calibrated through fixed mask-based sampling. This work holds practical significance for real-time, uncertainty-aware treatment planning and could generalize to other medical imaging and robotics domains requiring reliable probabilistic inferences.
Abstract
Accurate and reliable Magnetic Resonance Imaging (MRI) analysis is particularly important for adaptive radiotherapy, a recent medical advance capable of improving cancer diagnosis and treatment. Recent studies have shown that IVIM-NET, a deep neural network (DNN), can achieve high accuracy in MRI analysis, indicating the potential of deep learning to enhance diagnostic capabilities in healthcare. However, IVIM-NET does not provide calibrated uncertainty information needed for reliable and trustworthy predictions in healthcare. Moreover, the expensive computation and memory demands of IVIM-NET reduce hardware performance, hindering widespread adoption in realistic scenarios. To address these challenges, this paper proposes an algorithm-hardware co-optimization flow for high-performance and reliable MRI analysis. At the algorithm level, a transformation design flow is introduced to convert IVIM-NET to a mask-based Bayesian Neural Network (BayesNN), facilitating reliable and efficient uncertainty estimation. At the hardware level, we propose an FPGA-based accelerator with several hardware optimizations, such as mask-zero skipping and operation reordering. Experimental results demonstrate that our co-design approach can satisfy the uncertainty requirements of MRI analysis, while achieving 7.5 times and 32.5 times speedup on an Xilinx VU13P FPGA compared to GPU and CPU implementations with reduced power consumption.
