Computational Graph Representation of Equations System Constructors in Hierarchical Circuit Simulation

TL;DR

The paper introduces a scalable, JSON-netlist–based computational graph representation for hierarchical circuit equation constructors, enabling runtime dependencies and end-to-end gradient propagation across subcircuits. By treating subcircuits as graph nodes and introducing SubModels for dynamic parameters, it decouples structural connectivity from behavioral models, facilitating gradient-based optimization for device sizing and design automation. The approach supports forward and backward passes through hierarchical modules, yielding explicit rules for parameter passing and gradient flow across module boundaries. Demonstrated applications include CMOS device modeling with dynamic parameters and OpAmp sizing under PVT variations, highlighting improved decoupling, efficiency, and design flexibility over traditional HDL-based methods.

Abstract

Equations system constructors of hierarchical circuits play a central role in device modeling, nonlinear equations solving, and circuit design automation. However, existing constructors present limitations in applications to different extents. For example, the costs of developing and reusing device models -- especially coarse-grained equivalent models of circuit modules -- remain high while parameter sensitivity analysis is complex and inefficient. Inspired by differentiable programming and leveraging the ecosystem benefits of open-source software, we propose an equations system constructor using the computational graph representation, along with its JSON format netlist, to address these limitations. This representation allows for runtime dependencies between signals and subcircuit/device parameters. The proposed method streamlines the model development process and facilitates end-to-end computation of gradients of equations remainders with respect to parameters. This paper discusses in detail the overarching concept of hierarchical subcircuit/device decomposition and nested invocation by drawing parallels to functions in programming languages, and introduces rules for parameters passing and gradient propagation across hierarchical circuit modules. The presented numerical examples, including (1) an uncoupled CMOS model representation using "equivalent circuit decomposition+dynamic parameters" and (2) operational amplifier (OpAmp) auto device sizing, have demonstrated that the proposed method supports circuit simulation and design and particularly subcircuit modeling with improved efficiency, simplicity, and decoupling compared to existing techniques.

Figures (10)

• Figure 1: Simulator flowchart
• Figure 2: Flowchart: create computational graph from a JSON netlist
• Figure 3: Equations system constructor for hierarchical circuits: existing method v.s. computational graph. Each computing unit corresponds to a subcircuit, which can be decomposed into smaller subcircuits --- the smallest granularity subcircuit are the "basic elements". $\bm{e}^{(\cdots)}$ denotes the internal and external nodes of a subcircuit, $\bm{x}$ a generalized signal, such as node bias or branch current, $\bm{p}^{(\cdots)}$ the input parameters of a subcircuit, for example, the device size (alternatively, a non-linear capacitance, inductance, or current value of a basic element, functioning as a dynamic parameter), and $\bm{f}^{(\cdots)}$ the contribution of a subcircuit to the remainder of the simulation equations. Calculation of the Jacobian matrix is omitted in this schematic. In the existing method, a lower-layer parameter of a circuit module does not depend on the signal value ($\bm{x}[\bm{e}]$), and calculation of ParamExpr can be completed when the netlist is built. In the computational graph method, the dynamic parameters are derived from the intrinsic parameters output by SubModel --- these parameters are obtained at the calculation runtime of the systems of equations.
• Figure 4: Schematic diagram of hierarchical subcircuit module instances and computation rules. Text in red indicates the parts that mark the differences from the existing method tcherniaev2003transistor. Because the existing method does not need to support dynamic parameters, it is only necessary to store the fixed parameters of the devices in the computation rules of each circuit module. However, because the proposed method requires that parameters passed to lower-layer instances and devices be calculated during runtime, parameter indexing is necessary.
• Figure 5: Compiling circuit modules