ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models
Yuxuan Yin, Yu Wang, Boxun Xu, Peng Li
TL;DR
This work tackles the efficiency bottleneck in analog circuit sizing by introducing ADO-LLM, a cooperative framework that blends GP-based Bayesian Optimization with an LLM agent and a high-quality data sampler. The GP-BO proposer explores the global design space while the LLM agent generates high-quality, knowledge-informed design points from carefully selected demonstrations; a sampler ensures diverse yet valuable data. Empirical results on a two-stage differential amplifier and a hysteresis comparator show that ADO-LLM achieves the highest Figure of Merit and satisfies all specifications with fewer simulations than baselines, demonstrating data efficiency and improved robustness over traditional BO and single-LLM approaches. The findings suggest that integrating domain knowledge through LLMs with probabilistic surrogates can significantly accelerate automated analog circuit design, with implications for reduced design time and increased design reliability in practice.
Abstract
Analog circuit design requires substantial human expertise and involvement, which is a significant roadblock to design productivity. Bayesian Optimization (BO), a popular machine learning based optimization strategy, has been leveraged to automate analog design given its applicability across various circuit topologies and technologies. Traditional BO methods employ black box Gaussian Process surrogate models and optimized labeled data queries to find optimization solutions by trading off between exploration and exploitation. However, the search for the optimal design solution in BO can be expensive from both a computational and data usage point of view, particularly for high dimensional optimization problems. This paper presents ADO-LLM, the first work integrating large language models (LLMs) with Bayesian Optimization for analog design optimization. ADO-LLM leverages the LLM's ability to infuse domain knowledge to rapidly generate viable design points to remedy BO's inefficiency in finding high value design areas specifically under the limited design space coverage of the BO's probabilistic surrogate model. In the meantime, sampling of design points evaluated in the iterative BO process provides quality demonstrations for the LLM to generate high quality design points while leveraging infused broad design knowledge. Furthermore, the diversity brought by BO's exploration enriches the contextual understanding of the LLM and allows it to more broadly search in the design space and prevent repetitive and redundant suggestions. We evaluate the proposed framework on two different types of analog circuits and demonstrate notable improvements in design efficiency and effectiveness.
