A Jammer-Mitigating 267 Mb/s 3.78 mm$^2$ 583 mW 32$\times$8 Multi-User MIMO Receiver in 22FDX

TL;DR

The fabricated 22 nm FD-SOI ASIC is the first multi-user (MU) multiple-input multiple-output (MIMO) receiver ASIC that mitigates jamming attacks and is the only existing design that enables reliable data detection under jamming attacks.

Abstract

We present the first multi-user (MU) multiple-input multiple-output (MIMO) receiver ASIC that mitigates jamming attacks. The ASIC implements a recent nonlinear algorithm that performs joint jammer mitigation (via spatial filtering) and data detection (using a box prior on the data symbols). Our design supports 8 user equipments (UEs) and 32 basestation (BS) antennas, QPSK and 16-QAM with soft-outputs, and enables the mitigation of single-antenna barrage jammers and smart jammers. The fabricated 22 nm FD-SOI ASIC includes preprocessing, has a core area of 3.78 mm$^2$, achieves a throughput of 267 Mb/s while consuming 583 mW, and is the only existing design that enables reliable data detection under jamming attacks.

Figures (8)

• Figure 1: System model of the jammed multi-user (MU) MIMO uplink.
• Figure 2: SANDMAN approximately solves a non-convex optimization problem.
• Figure 3: Outline of the SANDMAN algorithm, which runs for $t_\text{max}$ iterations. Steps only executed once are in yellow.
• Figure 4: Overview of the SANDMAN architecture and implementation details of the processing elements (PEs). The control module is not shown. Rows and columns of PEs can be reconfigured into row adders and column adders.
• Figure 5: Performance for $32\times8$ MIMO with different jammers/constellations.