RO-SVD: A Reconfigurable Hardware Copyright Protection Framework for AIGC Applications

TL;DR

This work tackles the copyright challenges posed by AI-generated content by introducing RO-SVD, a hardware-accelerated, blockchain-backed framework that uses ring-oscillator entropy sources and SVD-based decomposition to generate device-specific authentication and stochastic seeds. The authors implement a HW/SW co-design on AI-enabled FPGAs, enabling on-device copyright marking and blockchain registration, with two blockchain integration pathways: lossless NFT embedding and robust DCT-DWT-SVD-based watermarking. Key contributions include a Jacobi-based SVD hardware module, flexible FPGA interface, and extensive validation on PYNQ-Z2 boards, along with NIST-compliant randomness tests and demonstrated reconfigurability for daily framework updates. The approach offers a low-cost, reconfigurable solution for traceability and rights management of multi-dimensional AIGC data, potentially influencing practical deployment of copyright management in GenAI workflows.

Abstract

The dramatic surge in the utilisation of generative artificial intelligence (GenAI) underscores the need for a secure and efficient mechanism to responsibly manage, use and disseminate multi-dimensional data generated by artificial intelligence (AI). In this paper, we propose a blockchain-based copyright traceability framework called ring oscillator-singular value decomposition (RO-SVD), which introduces decomposition computing to approximate low-rank matrices generated from hardware entropy sources and establishes an AI-generated content (AIGC) copyright traceability mechanism at the device level. By leveraging the parallelism and reconfigurability of field-programmable gate arrays (FPGAs), our framework can be easily constructed on existing AI-accelerated devices and provide a low-cost solution to emerging copyright issues of AIGC. We developed a hardware-software (HW/SW) co-design prototype based on comprehensive analysis and on-board experiments with multiple AI-applicable FPGAs. Using AI-generated images as a case study, our framework demonstrated effectiveness and emphasised customisation, unpredictability, efficiency, management and reconfigurability. To the best of our knowledge, this is the first practical hardware study discussing and implementing copyright traceability specifically for AI-generated content.

Figures (11)

• Figure 1: The overall flow of the proposed framework with the least significant bit (LSB) lossless application side.
• Figure 2: Operations and principles of proposed entropy source design.
• Figure 3: Pattern recognition of hardware entropy sources.
• Figure 4: S-value distribution in various hardware levels.
• Figure 5: S-value of the reconstruction matrix.