CircuitVAE: Efficient and Scalable Latent Circuit Optimization

TL;DR

CircuitVAE tackles the discrete, expensive-search problem of designing binary adders by embedding circuits into a continuous latent space with a $\beta$-VAE and a neural cost predictor. It introduces prior-regularized search and cost-weighted sampling to enable robust gradient-based optimization that outperforms reinforcement learning, genetic algorithms, and Bayesian optimization in sample efficiency. Across 32- and 64-bit adders and real-world chip workflows, CircuitVAE achieves lower area-delay costs with substantially fewer simulations, and generalizes to gray-to-binary converters. The approach holds promise for scalable, hardware-aware circuit optimization and can be extended to other prefix-based circuits and multipliers.

Abstract

Automatically designing fast and space-efficient digital circuits is challenging because circuits are discrete, must exactly implement the desired logic, and are costly to simulate. We address these challenges with CircuitVAE, a search algorithm that embeds computation graphs in a continuous space and optimizes a learned surrogate of physical simulation by gradient descent. By carefully controlling overfitting of the simulation surrogate and ensuring diverse exploration, our algorithm is highly sample-efficient, yet gracefully scales to large problem instances and high sample budgets. We test CircuitVAE by designing binary adders across a large range of sizes, IO timing constraints, and sample budgets. Our method excels at designing large circuits, where other algorithms struggle: compared to reinforcement learning and genetic algorithms, CircuitVAE typically finds 64-bit adders which are smaller and faster using less than half the sample budget. We also find CircuitVAE can design state-of-the-art adders in a real-world chip, demonstrating that our method can outperform commercial tools in a realistic setting.

Figures (8)

• Figure 1: A sample evolution of 32-bit adders discovered by CircuitVAE. Starting from the Sklansky structure, CircuitVAE iteratively navigates a learned latent space to produce different designs until reaching a lowest cost one on the right.
• Figure 2: The CircuitVAE algorithm flowchart. We first fit a VAE equipped with a cost predictor on an input dataset. We use prior-regularized search (\ref{['method:optimization']}) to optimize the cost predictor to generate new designs. We repeat this loop multiple times to gradually discover better designs.
• Figure 3: Curves of circuit cost (lower is better) vs simulation budget across a range of circuit sizes (rows) and timing constraints (columns). CircuitVAE consistently achieves lower costs at fewer simulations. The first and second row are 64-bit and 32-bit design tasks, respectively.
• Figure 4: Ablating search and training methods.
• Figure 5: The effect of changing prior weight $\gamma$ on latent search trajectories. Low values of $\gamma$ result in trajectories ending far away from training data.