RoutePlacer: An End-to-End Routability-Aware Placer with Graph Neural Network

TL;DR

RoutePlacer tackles the challenge of jointly optimizing placement and routability by introducing RouteGNN, a graph neural network that learns a differentiable congestion penalty on a RouteGraph that fuses both topological and geometrical circuit information. The framework enables end-to-end gradient-based optimization of cell positions and can also plug RouteGNN into existing two-stage placers to improve routability without sacrificing wirelength. Empirical results on DREAMPlace-based benchmarks (ISPD2011 and DAC2012) show substantial gains in total overflow reduction (up to 16% directly and 44% when integrated into two-stage pipelines) with minimal impact on routing wirelength. This work provides a scalable, extensible path toward differentiable routability-aware placement and points to future directions such as joint optimization for timing and power metrics.

Abstract

Placement is a critical and challenging step of modern chip design, with routability being an essential indicator of placement quality. Current routability-oriented placers typically apply an iterative two-stage approach, wherein the first stage generates a placement solution, and the second stage provides non-differentiable routing results to heuristically improve the solution quality. This method hinders jointly optimizing the routability aspect during placement. To address this problem, this work introduces RoutePlacer, an end-to-end routability-aware placement method. It trains RouteGNN, a customized graph neural network, to efficiently and accurately predict routability by capturing and fusing geometric and topological representations of placements. Well-trained RouteGNN then serves as a differentiable approximation of routability, enabling end-to-end gradient-based routability optimization. In addition, RouteGNN can improve two-stage placers as a plug-and-play alternative to external routers. Our experiments on DREAMPlace, an open-source AI4EDA platform, show that RoutePlacer can reduce Total Overflow by up to 16% while maintaining routed wirelength, compared to the state-of-the-art; integrating RouteGNN within two-stage placers leads to a 44% reduction in Total Overflow without compromising wirelength.

Figures (7)

• Figure 1: Overview of RoutePlacer. Forward Propagation: We construct the RouteGraph and initialize features, which are then inputted into RouteGNN to obtain routability estimations. ${\bm{X}} s$ represents the features of cells, nets, grid cells, topo-edges, and geom-edges. Backward Propagation: We compute gradients of routability estimations w.r.t. cell locations via the proposed differentiable geometrical features and automatic differentiation tools. The gradient information is utilized for analytical routability optimization.
• Figure 2: Framework of RouteGNN. We initialize raw features and apply Route-Geometrical and Topological message-passing to gather topological and geometrical information. Then, we fuse and update the heterogeneous hidden representations to readout routability estimation.
• Figure 3: Evaluations of RouteGNN. Experiments are conducted on a dataset comprising over 100 placements.
• Figure 4: Comparison of inference time on superblue7. We additionally plot the changes of electric overflow during placement eplace.
• Figure 5: Visualization of placement solutions and their overflow on superblue5. The legend on the right shows the numerical range of overflow corresponding to each color. (a) A placement generated by DREAMPlace. (b) A placement generated by RoutePlacer. We implement cell inflation for both methods.