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Integrated error-suppressed pipeline for quantum optimization of nontrivial binary combinatorial optimization problems on gate-model hardware at the 156-qubit scale

Natasha Sachdeva, Gavin S. Hartnett, Smarak Maity, Samuel Marsh, Yulun Wang, Adam Winick, Ryan Dougherty, Daniel Canuto, You Quan Chong, G. Adam Cox, Michael Hush, Pranav S. Mundada, Christopher D. B. Bentley, Michael J. Biercuk, Yuval Baum

Abstract

We introduce a novel hybrid quantum-classical variational optimization method for unconstrained binary combinatorial optimization problems on gate-model quantum computers, integrating a custom variational ansatz, staged feedback-based dual variational parameter update strategies, efficient parametric compilation, automated error suppression during hardware execution, and scalable O($n$) classical post-processing to correct for bitflip errors. Without this integrated approach, we show that standard circuit execution at scale produces output indistinguishable from random sampling, establishing the necessity of each pipeline component. We benchmark the method on IBM superconducting quantum computers for classically nontrivial optimization problems, where the optimization is conducted on hardware with no use of classical simulation or prior knowledge of the solution. For Max-Cut on random regular graphs with topologies not matched to device connectivity, the method achieves approximation ratios of 100% for unweighted 3-regular graphs up to 156 nodes, weighted regular graphs up to 80 nodes, and weighted 7-regular graphs up 50 nodes. Applied to higher-order binary optimization, the method finds the ground state energy of 127- and 156-qubit spin-glass models matched to device topology with linear, quadratic, and cubic interaction terms, achieving approximation ratios of at least 99.5% across all instances tested. The method consistently outperforms a classical local solver across all problems. Where published results on identical problem instances are available, our method demonstrates competitive or superior performance. These results demonstrate that an appropriately engineered approach enables gate-model quantum computers to produce high-quality solutions for nontrivial binary optimization problems at the 156 qubit scale, where naive implementations are insufficient for good performance.

Integrated error-suppressed pipeline for quantum optimization of nontrivial binary combinatorial optimization problems on gate-model hardware at the 156-qubit scale

Abstract

We introduce a novel hybrid quantum-classical variational optimization method for unconstrained binary combinatorial optimization problems on gate-model quantum computers, integrating a custom variational ansatz, staged feedback-based dual variational parameter update strategies, efficient parametric compilation, automated error suppression during hardware execution, and scalable O() classical post-processing to correct for bitflip errors. Without this integrated approach, we show that standard circuit execution at scale produces output indistinguishable from random sampling, establishing the necessity of each pipeline component. We benchmark the method on IBM superconducting quantum computers for classically nontrivial optimization problems, where the optimization is conducted on hardware with no use of classical simulation or prior knowledge of the solution. For Max-Cut on random regular graphs with topologies not matched to device connectivity, the method achieves approximation ratios of 100% for unweighted 3-regular graphs up to 156 nodes, weighted regular graphs up to 80 nodes, and weighted 7-regular graphs up 50 nodes. Applied to higher-order binary optimization, the method finds the ground state energy of 127- and 156-qubit spin-glass models matched to device topology with linear, quadratic, and cubic interaction terms, achieving approximation ratios of at least 99.5% across all instances tested. The method consistently outperforms a classical local solver across all problems. Where published results on identical problem instances are available, our method demonstrates competitive or superior performance. These results demonstrate that an appropriately engineered approach enables gate-model quantum computers to produce high-quality solutions for nontrivial binary optimization problems at the 156 qubit scale, where naive implementations are insufficient for good performance.
Paper Structure (15 sections, 8 equations, 11 figures, 2 tables, 3 algorithms)

This paper contains 15 sections, 8 equations, 11 figures, 2 tables, 3 algorithms.

Figures (11)

  • Figure 1: The optimization pipeline behind the quantum solver. In the input stage, a user-defined representation of the optimization problem is provided to the solver. Next, we construct the variational ansatz that is employed during the optimization process. In the compilation stage, the variational circuit is compiled to produce an optimized parametric circuit. The compiler may leverage an enhanced gate set of pre-calibrated pulse-level instructions of efficient (fast) 2-qubit gates. Finally, the optimization parameters are initialized and then passed to the closed-loop optimizer. Depending on the number of circuit parameters, a parameter reduction procedure may take place. In the hybrid execution stage, the parameterized circuits are submitted to the quantum hardware and the variational circuit parameters are optimized via a hybrid quantum-classical optimization loop. In the output stage, after final post-processing, the solution to the optimization problem is returned to the user.
  • Figure 2: The ansatz we employ for solving unconstrained optimization problems. The initial state is parameterized angles $\theta_j$, for $j=1,..,n$, followed by the standard QAOA repetition pattern of a cost-unitary and a mixing-unitary, defined by the $\gamma_i,\, \beta_i$ parameters for $i=1,...,p$. This ansatz has a total of $n+2p$ parameters where $n$ is the number of qubits and $p$ the number of QAOA layers.
  • Figure 3: Performance of the quantum solver on three combinatorial optimization problems. (a) A Max-Cut instance for a 3-regular unweighted random graph with 156 nodes. The plot shows the distribution of cut values for 15k configurations sampled from the optimal circuit found by the quantum solver, executed on ibm_kingston. The true maximum cut value of 213 is successfully attained by the solver. The random search and classical local solver distributions show the result of 15k configurations sampled uniformly at random and 15k local minima. (b) A Max-Cut instance for a 4-regular weighted random graph with 80 nodes. The weight of each edge was randomly chosen from four possible values $[1/4, 1/2, 3/4, 1]$, represented by different edge colors. Shown, cut values for 10k configurations sampled from the optimal circuit found by the quantum solver, executed on ibm_brisbane. The true maximum cut value of 88 is successfully attained by the solver. (c) Energy minimization of a 156-node high-order spin-glass model with parameters defined from ibm_kingston instance 0 following similarly defined problems in Ref. pelofske2024repo. The plot shows the energy distribution for 15k configurations sampled from the optimal circuit found by the quantum solver, executed on ibm_kingston, and for 15k configurations sampled uniformly at random (brute-force) and 15k local minima (local solver). The lowest and highest energies of this model instance (the energy band edges) are known to be $-242$ and $242$, respectively. As in (a,b), the true ground state was attained by the solver.
  • Figure 4: (a-c) The role of error suppression. The distribution of cut values obtained by sampling 16,384 configurations from a $p=1$ QAOA circuit for a Max-Cut instance for a randomly generated 3-regular graph with $40$ nodes. The circuit was executed on the ibm_sherbrooke device utilizing two performance management schemes, (a) using Q-CTRL error suppression pipeline and (b) Qiskit version 0.44, with optimization level 3 and resilience level 1. In all executions, the equal weights superposition state served as an initial state, optimal QAOA parameters were used and the data shown does not include post processing. (c) A reference distribution corresponding to uniformly sampling bitstrings at random. The purple and gray dashed lines indicate the mean of the Q-CTRL and the reference distribution. (d-e) The role of post processing. (d) The distributions of cost values obtained from the optimal circuit returned by our pipeline, before and after the application of post-processing, for cubic spin-glass instance 0 run on ibm_kingston also shown in Fig. \ref{['fig:maxcut_and_lanl_combined_plot']}c. (e) For reference, we show the distributions of cut values obtained by 15k random bitstrings and by applying post-processing on each of these 15k configurations, denoted as "local solver."
  • Figure 5: Theoretical bounds for optimal and maximum bias angles for $n$=156. The gray horizontal lines represent the bias angle $\delta$ schedule used for all data presented in this work (the first stage in the multi-stage optimization always has $\delta=0$ recovering the standard QAOA ansatz. We include all data taken with $n=156$, which includes two Max-Cut instances and four cubic spin-glass instances. The data points represent the hamming distance between the optimal solution returned at the end of the stage and the target bitstring used for biasing the initial state for all circuits during that stage.
  • ...and 6 more figures