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VERTECS: A COTS-based payload interface board to enable next generation astronomical imaging payloads

Ezra Fielding, Victor H. Schulz, Keenan A. A. Chatar, Kei Sano, Akitoshi Hanazawa

TL;DR

VERTECS tackles the challenge of handling large imaging data on a 6U CubeSat by enabling onboard processing and high-speed downlink through the VERTECS Camera Control Board (CCB). The CCB, built around a Raspberry Pi Compute Module 4 and powered by COTS hardware with open-source ECAD, serves as the sole payload interface to the VERTECS bus and provides gigabit Ethernet and a high-rate RS-232 path to the X-band transmitter, enabling a downlink rate of up to $5$ Mbps and substantial onboard compute potential. Hardware and software choices emphasize reuse of KITSUNE CCB heritage while expanding interfaces, storage ($32$ GB eMMC), and ML-capable processing; validation via table-top testing and Thermal Vacuum Tests demonstrates power, thermal, and data-transfer performance within mission constraints. The work foresees broader adoption of onboard machine learning and data-intensive payloads on nanosatellites, with the CCB design openly released to accelerate future missions.

Abstract

Due to advances in observation and imaging technologies, modern astronomical satellites generate large volumes of data. This necessitates efficient onboard data processing and high-speed data downlink. Reflecting this trend is the VERTECS 6U Astronomical Nanosatellite. Designed for the observation of Extragalactic Background Light (EBL), this mission is expected to generate a substantial amount of image data, particularly within the confines of CubeSat capabilities. This paper introduces the VERTECS Camera Control Board (CCB), an open-source payload interface board leveraging Commercial Off-The-Shelf (COTS) components, with a Raspberry Pi Compute Module 4 at its core. The VERTECS CCB hardware and software have been designed from the ground up to serve as the sole interface between the VERTECS bus system and astronomical imaging payload, while providing compute capability not usually seen in nanosatellites of this class. Responsible for mission data processing, it will facilitate high-speed data transfer from the imaging payload via gigabit Ethernet, while also providing a high-bitrate serial connection to the payload X-band transmitter for mission data downlink. Additional interfaces for secondary payloads are provided via USB-C and standard 15-pin camera connectors. The Raspberry Pi embedded within the VERTECS CCB operates on a standard Linux distribution, streamlining the software development process. Beyond addressing the current mission's payload control and data handling requirements, the CCB sets the stage for future missions with heightened data demands. Furthermore, it supports the adoption of machine learning and other compute-intensive applications in orbit. This paper delves into the development of the VERTECS CCB, offering insights into the design and validation of this next-generation payload interface, to ensure that it can survive the rigors of space flight.

VERTECS: A COTS-based payload interface board to enable next generation astronomical imaging payloads

TL;DR

VERTECS tackles the challenge of handling large imaging data on a 6U CubeSat by enabling onboard processing and high-speed downlink through the VERTECS Camera Control Board (CCB). The CCB, built around a Raspberry Pi Compute Module 4 and powered by COTS hardware with open-source ECAD, serves as the sole payload interface to the VERTECS bus and provides gigabit Ethernet and a high-rate RS-232 path to the X-band transmitter, enabling a downlink rate of up to Mbps and substantial onboard compute potential. Hardware and software choices emphasize reuse of KITSUNE CCB heritage while expanding interfaces, storage ( GB eMMC), and ML-capable processing; validation via table-top testing and Thermal Vacuum Tests demonstrates power, thermal, and data-transfer performance within mission constraints. The work foresees broader adoption of onboard machine learning and data-intensive payloads on nanosatellites, with the CCB design openly released to accelerate future missions.

Abstract

Due to advances in observation and imaging technologies, modern astronomical satellites generate large volumes of data. This necessitates efficient onboard data processing and high-speed data downlink. Reflecting this trend is the VERTECS 6U Astronomical Nanosatellite. Designed for the observation of Extragalactic Background Light (EBL), this mission is expected to generate a substantial amount of image data, particularly within the confines of CubeSat capabilities. This paper introduces the VERTECS Camera Control Board (CCB), an open-source payload interface board leveraging Commercial Off-The-Shelf (COTS) components, with a Raspberry Pi Compute Module 4 at its core. The VERTECS CCB hardware and software have been designed from the ground up to serve as the sole interface between the VERTECS bus system and astronomical imaging payload, while providing compute capability not usually seen in nanosatellites of this class. Responsible for mission data processing, it will facilitate high-speed data transfer from the imaging payload via gigabit Ethernet, while also providing a high-bitrate serial connection to the payload X-band transmitter for mission data downlink. Additional interfaces for secondary payloads are provided via USB-C and standard 15-pin camera connectors. The Raspberry Pi embedded within the VERTECS CCB operates on a standard Linux distribution, streamlining the software development process. Beyond addressing the current mission's payload control and data handling requirements, the CCB sets the stage for future missions with heightened data demands. Furthermore, it supports the adoption of machine learning and other compute-intensive applications in orbit. This paper delves into the development of the VERTECS CCB, offering insights into the design and validation of this next-generation payload interface, to ensure that it can survive the rigors of space flight.
Paper Structure (16 sections, 8 figures)

This paper contains 16 sections, 8 figures.

Table of Contents

  1. INTRODUCTION
  2. SATELLITE DESIGN
  3. VERTECS Bus
  4. Payload
  5. VERTECS CCB DESIGN
  6. Hardware
  7. Software
  8. VALIDATION METHODS
  9. Bus Interface
  10. Payload Interface
  11. Communications Interface
  12. RESULTS
  13. Bus Interface
  14. Payload Interface
  15. Communications Interface
  16. ...and 1 more sections

Figures (8)

  • Figure 1: Depiction of the VERTECS 6U Astronomical Nanosatellite with solar panels deployed.
  • Figure 2: System-level overview diagram depicting the connections between the VERTECS bus, payload and CCB.
  • Figure 3: Subsystem-level overview diagram showing connections of components included on the CCB.
  • Figure 4: Front (left) and back (right) of the VERTECS CCB Engineering Model.
  • Figure 5: VERTECS STM prepped for TVT.
  • ...and 3 more figures