ML-QLS: Multilevel Quantum Layout Synthesis

TL;DR

Quantum Layout Synthesis (QLS) faces severe scalability and optimality challenges as qubit counts grow. ML-QLS introduces a hierarchical multilevel flow that coarsens both circuit and device graphs, solves the coarsest level with an exact SMT-based tool, and refines the result via scalable sRefine with SA-based initial mapping and an A*-based SWAP insertion, guided by qubit regions. The approach yields substantial SWAP reductions (up to about 69% on grid architectures) while maintaining runtime feasibility, across QUEKO, QAOA, and QASMBench circuits on grid and heavy-hex architectures. This work demonstrates that a multilevel framework can deliver high-quality QLS solutions for hundreds of qubits, enabling scalable quantum compilation and potential extensions to other quantum design automation tasks.

Abstract

Quantum Layout Synthesis (QLS) plays a crucial role in optimizing quantum circuit execution on physical quantum devices. As we enter the era where quantum computers have hundreds of qubits, we are faced with scalability issues using optimal approaches and degrading heuristic methods' performance due to the lack of global optimization. To this end, we introduce a hybrid design that obtains the much improved solution for the heuristic method utilizing the multilevel framework, which is an effective methodology to solve large-scale problems in VLSI design. In this paper, we present ML-QLS, the first multilevel quantum layout tool with a scalable refinement operation integrated with novel cost functions and clustering strategies. Our clustering provides valuable insights into generating a proper problem approximation for quantum circuits and devices. Our experimental results demonstrate that ML-QLS can scale up to problems involving hundreds of qubits and achieve a remarkable 52% performance improvement over leading heuristic QLS tools for large circuits, which underscores the effectiveness of multilevel frameworks in quantum applications.

Figures (7)

• Figure 1: A multilevel V cycle for circuit placement. The inputs to circuit placement are a chip (a transparent box with black boundary) to place objects and a circuit consisting of placeable objects (colored boxes) and nets defining the connection between the objects. The process initiates with iterative clustering to reduce the problem size, continuing until reaching the coarsest level where the problem is directly solved. The placeable objects marked in the same types of color form a coarser object at the coarser level. The dotted lines in chip represents the resolution at the current level. Subsequently, interpolation and refinement are used at each finer level, ultimately yielding the finest-level solution.
• Figure 2: An example of a quantum circuit, coupling graph, and the corresponding QLS result.
• Figure 3: ML-QLS flow.
• Figure 4: A V cycle example for a QUEKO circuit and Rigetti Aspen-4 coupling graph to demonstrate the effect of clustering on the final QLS solution. The partial gate list of the QUEKO circuit is shown at the top of the figure. According to the qubit interaction frequency, we generate a proper circuit clustering, including coarser qubits and the coarser partial gate list. A coarser qubit $q_{c}:\{q, q'\}$ indicates finer qubit $q$ and $q'$ form coarser qubit $q_{c}$. For device clustering, we may have two options to generate different coarser coupling graphs. At the coarsest level, the first option leads to four SWAP gates even if its later compilation result is optimal, while we get a SWAP-free solution with the second clustering option. $m_{i}$ denotes the $i$-th qubit mapping in the circuit, and the gate execution on an edge is marked by a thick line in $m_{i}$ using the same color for font in the coarser gate list. The edges for SWAP gates are indicated by red double arrow lines. With the coarsest-level solution, we show the qubit region for $q_{2}$ as a refinement example. After refinement, we obtain a solution using two and zero SWAP gates with the first and second clustering options, respectively.
• Figure 5: An example to exhibit the effectiveness of cost for related qubits. (a) A gate list. (b) Optimal mapping on a grid coupling graph for $q_0$ to $q_4$ based on Eq. \ref{['eq:DisForGates']}. Placing $q_5$ to $q_8$ on any of the blue circles yields the same cost. (c) One optimal solution based on Eq. \ref{['eq:DisForGates']} uses seven SWAP gates . (d) One optimal solution based on Eq. \ref{['eq:sa_cost']} employs three SWAP gates.