A Comprehensive Survey on SmartNICs: Architectures, Development Models, Applications, and Research Directions

TL;DR

A background encompassing an overview of the evolution of NICs from basic to SmartNICs is provided, describing their architectures, development environments, and advantages over legacy NICs, and a comprehensive taxonomy of applications offloaded to SmartNICs is presented.

Abstract

The end of Moore's Law and Dennard Scaling has slowed processor improvements in the past decade. While multi-core processors have improved performance, they are limited by the application's level of parallelism, as prescribed by Amdahl's Law. This has led to the emergence of domain-specific processors that specialize in a narrow range of functions. Smart Network Interface Cards (SmartNICs) can be seen as an evolutionary technology that combines heterogeneous domain-specific processors and general-purpose cores to offload infrastructure tasks. Despite the impressive advantages of SmartNICs and their importance in modern networks, the literature has been missing a comprehensive survey. To this end, this paper provides a background encompassing an overview of the evolution of NICs from basic to SmartNICs, describing their architectures, development environments, and advantages over legacy NICs. The paper then presents a comprehensive taxonomy of applications offloaded to SmartNICs, covering network, security, storage, and machine learning functions. Challenges associated with SmartNIC development and deployment are discussed, along with current initiatives and open research issues.

Figures (50)

• Figure 1: Growth in processor performance over 40 years, relative to the VAX 11/780 as measured by the SPEC integer benchmarks. Reproduced from hennessy2011computer.
• Figure 2: Network port speeds (solid line, right y-axis) versus processor speed (dotted line, left y-axis) over the years. Port speeds are increasing while processor speeds are plateauing. Reproduced from elinoff2020smartnic.
• Figure 3: Paper roadmap.
• Figure 4: Main functional blocks of (a) traditional NICs, (b) offload NICs, and (c) SmartNICs.
• Figure 5: In a deployment with a traditional NIC (a), the host CPU cores execute infrastructure functions and user applications. With SmartNICs (b), the host CPU cores solely execute user applications. The SmartNIC CPU cores assist other accelerators in executing infrastructure functions.