AMSNet: Netlist Dataset for AMS Circuits

TL;DR

The paper addresses the lack of a large, cross-modal dataset linking AMS schematic diagrams to transistor-level SPICE netlists and presents AMSNet, a pipeline that automatically detects components and nets from schematics and outputs SPICE netlists. AMSNet-1.0 comprises 894 schematics and associated nets, with component detection via YOLO-V8 achieving 97.1% accuracy and net detection/netlist labeling reaching $96.7\%$ accuracy, including manual verification. The work demonstrates GPT-4’s potential to provide design-style guidance once a robust schematic-to-netlist knowledge base is established, and outlines clear future directions for expanding the dataset, recognizing functional macros, enabling automatic AMS front-end design, and constructing MLLM4EDA benchmarks. Overall, AMSNet aims to accelerate AMS circuit design by enabling reliable cross-modal data for MLLMs and laying groundwork for automated topology generation and AI-assisted front-end processes.

Abstract

Today's analog/mixed-signal (AMS) integrated circuit (IC) designs demand substantial manual intervention. The advent of multimodal large language models (MLLMs) has unveiled significant potential across various fields, suggesting their applicability in streamlining large-scale AMS IC design as well. A bottleneck in employing MLLMs for automatic AMS circuit generation is the absence of a comprehensive dataset delineating the schematic-netlist relationship. We therefore design an automatic technique for converting schematics into netlists, and create dataset AMSNet, encompassing transistor-level schematics and corresponding SPICE format netlists. With a growing size, AMSNet can significantly facilitate exploration of MLLM applications in AMS circuit design. We have made an initial set of netlists public, and will make both our netlist generation tool and the full dataset available upon publishing of this paper.

Figures (6)

• Figure 1: The full schematic-to-netlist pipeline
• Figure 2: Grouping neighboring components for net detection
• Figure 3: Handling intersections for net detection
• Figure 4: An example of component pin ordering
• Figure 5: AMSNet summary from 894 schematics