Towards Scalable Multi-Chip Wireless Networks with Near-Field Time Reversal

TL;DR

This work addresses the ISI and Co-Channel Interference challenges of wireless Network-on-Chip by applying Time Reversal (TR) to static, near-field chip-scale channels. By pre-characterizing the channel impulse response (CIR) and using a time-reversed matched filter, the approach focuses energy at intended receivers while suppressing interference, enabling multiple concurrent links with aggregate speeds well above $100\, \mathrm{Gb/s}$. The study combines full-wave CST simulations and MATLAB-based PHY analysis across a four-chiplet interposer at 140 GHz, and extends to variations in frequency, chiplet count, and finite TR-filter sampling, showing robust gains and graceful degradation under non-ideal filters. The results indicate TR can dramatically raise symbol rates and support multi-link WNoC, with practical practicality considerations addressed via non-ideal filter modeling and a clear path toward chip-scale TR implementations. Overall, TR-based WNoC emerges as a promising route to scalable, high-throughput wireless interconnects within computing packages.

Abstract

The concept of Wireless Network-on-Chip (WNoC) has emerged as a potential solution to address the escalating communication demands of modern computing systems due to its low-latency, versatility, and reconfigurability. However, for WNoC to fulfill its potential, it is essential to establish multiple high-speed wireless links across chips. Unfortunately, the compact and enclosed nature of computing packages introduces significant challenges in the form of Co-Channel Interference and Inter-Symbol Interference, which not only hinder the deployment of multiple spatial channels but also severely restrict the symbol rate of each individual channel. In this paper, we posit that Time Reversal (TR) could be effective in addressing both impairments in this static scenario thanks to its spatiotemporal focusing capabilities even in the near field. Through comprehensive full-wave simulations and bit error rate analysis in multiple scenarios and at multiple frequency bands, we provide evidence that TR can increase the symbol rate by an order of magnitude, enabling the deployment of multiple concurrent links and achieving aggregate speeds exceeding 100 Gb/s. Finally, we evaluate the impact of reducing the sampling rate of the TR filter on the achievable speeds, paving the way to practical TR-based wireless communications at the chip scale.

Figures (11)

• Figure 1: Overview of the application of time reversal in a wireless network within package. Modulated data is transmitted through the proposed TR filter and focused on the intended receivers.
• Figure 2: Summary of the proposed methodology: Characterization of channel impulse response and analyzing the proposed communication with MATLAB
• Figure 3: Evaluated TR scenarios for four and sixteen chiplets in an interposer package, with multiple concurrent transmitters at the same time, different data to different receivers.
• Figure 4: Return loss for antennas at 140/170/200 GHz, four chiplets.
• Figure 5: TR with single-link transmissions in an interposer package at 140GHz (a) Spatial distribution of field before and applying TR. (b) Signal received over time in node $B$ before and after applying TR. (c) Total received power in the intended receiver $B$ and non-intended receivers $C$--$F$ (d) BER as a function of data rate for a total power of 10 dBm in the TR and Non-TR cases.