Complete Boolean Algebra for Memristive and Spintronic Asymmetric Basis Logic Functions

TL;DR

This paper addresses the challenge of designing efficient logic circuits for emerging asymmetric basis functions, specifically IAND and IMPLY, implemented on memristor and bilayer avalanche spin-diode devices. It introduces a complete Boolean algebra tailored to asymmetric logic, including core identities, distributive and De Morgan laws, duality, and canonical normal forms (CDNF/CCNF and SOI/NOI, IOS/ION), plus the relationship between IAND and IMPLY. The framework enables direct synthesis and minimization of asymmetric circuits without translating to conventional symmetric Boolean algebra, and builds on prior work showing a 28% reduction in computational steps for a memristive full adder using a modified Karnaugh map method. The contribution has potential to unlock substantial efficiency gains in post-CMOS logic by exploiting non-commutative operations native to memristive and spintronic devices, providing a foundation for scalable logic design automation.

Abstract

The increasing advancement of emerging device technologies that provide alternative basis logic sets necessitates the exploration of innovative logic design automation methodologies. Specifically, emerging computing architectures based on the memristor and the bilayer avalanche spin-diode offer non-commutative or `asymmetric' operations, namely the inverted-input AND (IAND) and implication as basis logic gates. Existing logic design techniques inadequately leverage the unique characteristics of asymmetric logic functions resulting in insufficiently optimized logic circuits. This paper presents a complete Boolean algebraic framework specifically tailored to asymmetric logic functions, introducing fundamental identities, theorems and canonical normal forms that lay the groundwork for efficient synthesis and minimization of such logic circuits without relying on conventional Boolean algebra. Further, this paper establishes a logical relationship between implication and IAND operations. A previously proposed modified Karnaugh map method based on a subset of the presented algebraic principles demonstrated a 28% reduction in computational steps for an algorithmically designed memristive full adder; the presently-proposed algebraic framework lays the foundation for much greater future improvements.

Figures (5)

• Figure 1: The bilayer avalanche spin-diode. The flow of currents in control wires A and B induces a magnetic field over the semiconductor p-n junction, leading to the modulation of the output current.
• Figure 2: Bilayer avalanche spin-diode device performs a (a) Boolean OR if the input currents A and B flow in the same direction, and an (b) IAND function if A and B have opposite directions.
• Figure 3: Schematic diagram illustrating the memristive implication logic, in which the resistance state is modulated by applying voltages to the memristors.
• Figure 4: Karnaugh map representations for the full adder equations: (a) Sum (\ref{['eq:SumFA']}). (b) Carry out (\ref{['eq:CoutFA']}).
• Figure 5: Standard NAND gate realization using stateful memristive implication.

Theorems & Definitions (13)

• Theorem 1: Asymmetric Commutation
• Theorem 2: Conventional 'Non-Associativity'
• Theorem 3: Non-Inverting Associativity
• Theorem 4: Inverting Associativity
• Theorem 5: Distributive Law - I
• Theorem 6: Distributive Law - II
• Theorem 7: Distributive Law - III
• Theorem 8: Distributive Law - IV
• Theorem 9: Distributive Law - V
• Theorem 10: Distributive Law - VI