Fault-tolerant quantum computing with the parity code and noise-biased qubits

TL;DR

This work presents a fault-tolerant quantum computing architecture that combines biased-noise qubits (e.g., cat qubits) with the parity code implemented on an LHZ-like layout to achieve scalable, nearest-neighbor compatible connectivity. The parity code encodes k logical qubits into n = k(k+1)/2 physical qubits with distance d = k, using weight-3/4 Z-type stabilizers, and defines logical operators via parity mappings, enabling efficient multi-qubit operations. By concatenating the parity code with bias-preserving cat qubits, the authors realize a universal fault-tolerant gate set through transversal operations, code deformation, and gate teleportation, including native CZ and Rzz-type interactions and magic-state distillation for T/S gates. The framework promises a higher encoding rate than the repetition code and flexible code layouts on a 2D lattice, making long-range, parallel quantum operations more practical for near-term fault-tolerant quantum computation.

Abstract

We present a fault-tolerant universal quantum computing architecture based on a code concatenation of biased-noise qubits and the parity architecture. The parity architecture can be understood as an LDPC code tailored specifically to obtain any desired logical connectivity from nearest-neighbor physical interactions. The code layout can be dynamically adjusted to algorithmic requirements on-the-fly. This allows for implementations with any desired code distance with a universal set of fault-tolerant gates. In addition to the previously explored tool-sets for concatenated cat codes, our approach features parallelizable interactions between arbitrary sets of qubits by directly addressing the parity qubits in the code. The proposed scheme enables codes with less physical qubit overhead compared to the repetition code with the same code distances, while requiring only weight-3 and weight-4 stabilizers and nearest-neighbor 2D square-lattice connectivity.

Figures (8)

• Figure 1: Parity Code in the LHZ Layout. All stabilizers are in the $Z$ basis and have weight 3 or 4. Physical $Z$ operations on base qubits (single-index label) translate directly to logical $Z$ operations on the corresponding logical qubits. Physical $Z$ operations on parity qubits (multi-index label) map to logical multi-body operations.
• Figure 2: Ratio of the logical error rate $p_{\text{parity}}$ of the parity code using LHZ layout over the logical error rate $p_{\text{rep}}$ of $k$ repetition codes per stabilizer measurement round with equal number of physical qubits as a function of decoherence error probability $p_{\text{dec}}$ and CNOT error probability $p_{\text{CNOT}}$ for multiple logical system sizes $k$. The value at ${p_{\text{dec}} =p_{\text{CNOT}}=0}$ is set to $1$. The decoherence error represents bit-flip errors induced by interaction with the environment, while any phase-flip errors are neglected in this calculation. The parity code is advantageous to the repetition code in regimes with non-vanishing error rates and CNOT errors below approximately $5\%$. Data available at data
• Figure 3: Protocols for adding (top) or removing (bottom) a parity qubit D which is in a stabilizer operator with qubits A,B and C (i.e., $D = A\triangle B\triangle C)$. Multiple addition or removal operations can be parallelized by pushing all corrections to the end and classically tracking any non-commuting effects of this (taking into account how they affect measurement outcomes, see messinger2023 for more details). Both the protocols for addition and removal of qubits can be performed during syndrome measurement rounds. Note that, when a qubit is removed, the corresponding stabilizer is already excluded from that syndrome measurement round.
• Figure 4: Layout of base qubits and parity qubits allowing fixed-range connectivity and constant code distance $d=9$. The layout results from the full LHZ triangle Fellner2022universal with the tip (containing long-range parity qubits) cut off. On the sides, an additional structure (highlighted region) can be added to grow logical $X$ operators on the boundary to the same length as the others and thereby retain higher code distance.
• Figure 5: Example layout with code distance ${d=5}$, exhibiting high connectivity between logical qubits 0 to 4, while logical qubits 5 and 6 are decoupled from the others and encoded as in a repetition code. Logical qubit 0 has multiple base qubit copies in addition to parity qubits. This allows for using certain methods from repetition encodings, e.g., for implementing a fault-tolerant gate, while keeping the parity-mediated connectivity with other logical qubits.