Table of Contents
Fetching ...

Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS

Ying-Lin Chen, Jacob Deforce, Vic De Ridder, Bappaditya Dey, Victor Blanco, Sandip Halder, Philippe Leray

TL;DR

This work tackles the challenge of defect inspection in High-NA EUVL by introducing SEMI-SuperYOLO-NAS, a scale-invariant ADCD framework that incorporates a SR-assisted branch to learn high-resolution features from low-resolution SEM images and to generate upscaled images for cross-resolution defect detection without explicit retraining. Leveraging two LS-pattern FAB datasets, the authors integrate an enhanced data-augmentation strategy and HR/LR image pairing to train a NAS-based detector that operates across resolutions. Empirical results show notable improvements in mAP over baselines, zero-shot inference across process conditions, and favorable upsampling performance compared to prior SR-based methods, indicating practical gains in SEM throughput and robust nano-scale defect detection. The approach demonstrates strong potential for scalable, cross-resolution defect inspection in semiconductor manufacturing, with room for improving SR reconstruction quality and NAS search efficiency in future work.

Abstract

Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufacturing. To address this, suppliers are exploring thinner photoresists and new underlayers/hardmasks. These may suffer from poor SNR, complicating defect detection. Vision-based ML algorithms offer a promising solution for semiconductor defect inspection. However, developing a robust ML model across various image resolutions without explicit training remains a challenge for nano-scale defect inspection. This research's goal is to propose a scale-invariant ADCD framework capable to upscale images, addressing this issue. We propose an improvised ADCD framework as SEMI-SuperYOLO-NAS, which builds upon the baseline YOLO-NAS architecture. This framework integrates a SR assisted branch to aid in learning HR features by the defect detection backbone, particularly for detecting nano-scale defect instances from LR images. Additionally, the SR-assisted branch can recursively generate upscaled images from their corresponding downscaled counterparts, enabling defect detection inference across various image resolutions without requiring explicit training. Moreover, we investigate improved data augmentation strategy aimed at generating diverse and realistic training datasets to enhance model performance. We have evaluated our proposed approach using two original FAB datasets obtained from two distinct processes and captured using two different imaging tools. Finally, we demonstrate zero-shot inference for our model on a new, originating from a process condition distinct from the training dataset and possessing different Pitch characteristics. Experimental validation demonstrates that our proposed ADCD framework aids in increasing the throughput of imaging tools for defect inspection by reducing the required image pixel resolutions.

Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS

TL;DR

This work tackles the challenge of defect inspection in High-NA EUVL by introducing SEMI-SuperYOLO-NAS, a scale-invariant ADCD framework that incorporates a SR-assisted branch to learn high-resolution features from low-resolution SEM images and to generate upscaled images for cross-resolution defect detection without explicit retraining. Leveraging two LS-pattern FAB datasets, the authors integrate an enhanced data-augmentation strategy and HR/LR image pairing to train a NAS-based detector that operates across resolutions. Empirical results show notable improvements in mAP over baselines, zero-shot inference across process conditions, and favorable upsampling performance compared to prior SR-based methods, indicating practical gains in SEM throughput and robust nano-scale defect detection. The approach demonstrates strong potential for scalable, cross-resolution defect inspection in semiconductor manufacturing, with room for improving SR reconstruction quality and NAS search efficiency in future work.

Abstract

Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufacturing. To address this, suppliers are exploring thinner photoresists and new underlayers/hardmasks. These may suffer from poor SNR, complicating defect detection. Vision-based ML algorithms offer a promising solution for semiconductor defect inspection. However, developing a robust ML model across various image resolutions without explicit training remains a challenge for nano-scale defect inspection. This research's goal is to propose a scale-invariant ADCD framework capable to upscale images, addressing this issue. We propose an improvised ADCD framework as SEMI-SuperYOLO-NAS, which builds upon the baseline YOLO-NAS architecture. This framework integrates a SR assisted branch to aid in learning HR features by the defect detection backbone, particularly for detecting nano-scale defect instances from LR images. Additionally, the SR-assisted branch can recursively generate upscaled images from their corresponding downscaled counterparts, enabling defect detection inference across various image resolutions without requiring explicit training. Moreover, we investigate improved data augmentation strategy aimed at generating diverse and realistic training datasets to enhance model performance. We have evaluated our proposed approach using two original FAB datasets obtained from two distinct processes and captured using two different imaging tools. Finally, we demonstrate zero-shot inference for our model on a new, originating from a process condition distinct from the training dataset and possessing different Pitch characteristics. Experimental validation demonstrates that our proposed ADCD framework aids in increasing the throughput of imaging tools for defect inspection by reducing the required image pixel resolutions.
Paper Structure (14 sections, 21 figures, 5 tables)

This paper contains 14 sections, 21 figures, 5 tables.

Figures (21)

  • Figure 1: Depiction of CD-SEM imaging time (sec.) against image resolution (WXH).
  • Figure 2: CD-SEM images comparing resist thicknesses of 25nm and 15nm. As the resist thickness decreases, the SEM Signal-to-Noise Ratio (SNR) deteriorates.
  • Figure 3: Defect class examples in SEM-ADI dataset. From left to right: (a) Bridge, (b) Line-collapse, (c) Gap & Probable-gap and (d) Micro-bridges.
  • Figure 4: Defect class examples in EDR-AEI dataset. (a) bridge (b) pattern-collapse (c) dark-spot and (d) break.
  • Figure 5: Sample of augmentation on EDR-AEI break defect. (a) original image, (b) RandomShadow, (c) GaussNoise, (d) RandomFog, (e) RandomBrightness, (f) RandomGamma, (g) RandomOvershoot, and (h) Cutout.
  • ...and 16 more figures