Merits of Time-Domain Computing for VMM -- A Quantitative Comparison

TL;DR

The paper addresses energy-efficient VMM on edge devices by comparing digital, analog, and time-domain (TD) computing, introducing a novel efficiency metric $\eta_{ESNR}=\frac{\mathrm{SNR}_{cell}}{\sqrt{E_{op}}}$ and a scalable TD-MAC baseline. It combines SPICE-based cell and circuit models with a Python framework to evaluate how error and energy scale with array size $N$, channels $M$, and redundancy $R$, including a sophisticated time-to-digital conversion strategy. Key findings show digital dominance in error-free settings, but TD and charge-domain analog approaches offer competitive energy under relaxed accuracy, with TD excelling for small-to-medium arrays and analog becoming favorable at larger scales when tolerances are allowed. The results inform design choices for edge VMM accelerators, highlighting a viable tradeoff space where TD-MAC can deliver energy efficiency and acceptable accuracy in constrained area and throughput scenarios. Overall, the work advances understanding of time-domain computation's role alongside digital and analog approaches in practical VMM deployments.

Abstract

Vector-matrix-multiplication (VMM) accel-erators have gained a lot of traction, especially due to therise of convolutional neural networks (CNNs) and the desireto compute them on the edge. Besides the classical digitalapproach, analog computing has gone through a renais-sance to push energy efficiency further. A more recent ap-proach is called time-domain (TD) computing. In contrastto analog computing, TD computing permits easy technol-ogy as well as voltage scaling. As it has received limitedresearch attention, it is not yet clear which scenarios aremost suitable to be computed in the TD. In this work, weinvestigate these scenarios, focussing on energy efficiencyconsidering approximative computations that preserve ac-curacy. Both goals are addressed by a novel efficiency met-ric, which is used to find a baseline design. We use SPICEsimulation data which is fed into a python framework toevaluate how performance scales for VMM computation.We see that TD computing offers best energy efficiency forsmall to medium sized arrays. With throughput and sili-con footprint we investigate two additional metrics, givinga holistic comparison.

Figures (12)

• Figure 1: Overview over different compute domains.
• Figure 2: Weight static system overview.
• Figure 3: (a) Cascading behavior. (b) Basic delay cells. (c) comparison of cells in b.
• Figure 4: Baseline 1xB TDMAC cell. (a) Schematic. (b) Performance metrics.
• Figure 5: Schematic for SAR-TDC (a) and hybrid TDC (b). Hybrid TDC working principle (c).