Effectiveness of the syndrome extraction circuit with flag qubits on IBM quantum hardware

TL;DR

The study tackles scalability of quantum error correction on IBM quantum hardware with nontrivial connectivity by implementing a syndrome extraction circuit for the repetition code using flag qubits on ibm_kyoto. It compares no-flag, single-flag, and double-flag configurations, demonstrating that logical error rates decrease as code distance increases from $d=3$ to $d=9$ even when data and syndrome qubits are not directly adjacent. The analysis employs hardware-based and Stim-based decoding through detector-graphs and PyMatching, revealing how flag qubits influence error propagation and cross-talk. These results establish the feasibility of flag-qubit syndrome extraction on IBM heavy-hexagon hardware and provide guidance for embedding larger codes and exploring future directions toward more complex codes like the surface code.

Abstract

Large scale quantum circuits are required to exploit the advantages of quantum computers. Despite significant advancements in quantum hardware, scalability remains a challenge, with errors accumulating as more qubits and gates are added. To overcome this limitation, quantum error-correction codes have been introduced. Although the success of quantum error correction codes has been demonstrated on superconducting quantum processors and neutral atom-based systems, there have been no experimental reports of error suppression using flag qubits on a quantum processor. IBM's quantum hardware features a non-topological coupling map, and past developments of quantum error correction codes on this platform have primarily explored the use of flag qubits. Here, we report the successful implementation of a syndrome extraction circuit with flag qubits on IBM quantum computers. Moreover, we demonstrate its effectiveness by considering the repetition code as a test code among the quantum error-correcting codes. Even though the data qubit is not adjacent to the syndrome qubit, logical error rates diminish as the distance of the repetition code increases from three to nine. Even when two flag qubits exist between the data and syndrome qubits, the logical error rates decrease as the distance increases similarly. This confirms the successful implementation of the syndrome extraction circuit with flag qubits on the IBM quantum computer.

Figures (25)

• Figure 1: Quantum circuit for the Z syndrome extraction circuit: (a) without a flag qubit, (b) with a single-flag qubit, and (c) with double-flag qubits. A syndrome qubit is prepared as $\ket{+}$ by applying the Hadamard gates and a flag qubit is prepared as $\ket{0}$. When a flag qubit exists, there is an indirect interaction between a data qubit and syndrome qubit via CZ and CNOT gates. The blue and red lines display propagated Z and X errors caused by the initialization error on one of physical qubits.
• Figure 2: Error detection in the repetition code using two flag qubits. The code uses initially selected physical qubits from a heavy-hexagon structure. The code progresses with time represented on the horizontal axis from left to right. The blue, black, and red dots correspond to data, syndrome, and flag qubits, respectively. The code undergoes multiple rounds of a syndrome extraction circuit, which involves reset and measurement gates on each syndrome and flag qubit. When the code uses the Z syndrome extraction circuit, we show the detection of an X error on a data qubit. The error is an example of an ST error. This error disseminates Z or X errors to nearby flag and syndrome qubits, indicated by the blue and red lines, from the data qubit. Over time, outcomes of three syndrome qubits, those closest to the data qubit, are affected: one is from the syndrome extraction circuit round highlighted with the magenta color, where the initial error occurs. The other two are from the subsequent round of the syndrome extraction circuit highlighted with the green color. The error can be detected by comparing consecutive measured outcomes of syndrome and flag qubits.
• Figure 3: Process example for syndrome extraction round in $[3,1,3]_{f=1}$. The figure explains the process of the quantum circuit that samples the result and calculates the syndrome from the measurement result. The quantum circuit consists of three parts: initializing data qubits, R rounds of the syndrome extraction circuit with reset gates on flag and syndrome qubits, and measuring data qubits. The outcomes from each stabilizer extraction circuit are used to obtain the syndrome by employing XOR gates across both temporal and spatial dimensions.
• Figure 4: Two-dimensional detector graph that displays a qubit error. Errors that are probable in the system are expressed as the S error (space error), T error (time error), and ST error (space-time error). The virtual node is introduced to show the S error on the boundary data qubits.
• Figure 5: Basis gate decomposition of ibm_kyoto. ibm_kyoto uses $\{ R_Z , \sqrt{X}, X, \mathrm{ECR} \}$ gate set as basis gates. The construction of logic gates of repetition code in terms of basis gates of ibm_kyoto are provided: (a) Hadamard gate, (b) conditional reset gate, (c) CNOT gate, and (d) CZ gate. Detailed information can be found in the supplementary material.