Reconfigurable Intelligent Surfaces for THz: Hardware Design and Signal Processing Challenges
George C. Alexandropoulos, Antonio Clemente, Sérgio Matos, Ryan Husbands, Sean Ahearne, Qi Luo, Verónica Lain-Rubio, Thomas Kürner, Luís M. Pessoa
TL;DR
Some of the most significant hardware design and signal processing challenges with THz RISs are overviewed, and a preliminary analysis of their impact on the overall link budget and system performance is presented, conducted in the framework of the ongoing TERRAMETA project.
Abstract
Wireless communications in the THz frequency band is an envisioned revolutionary technology for sixth Generation (6G) networks. However, such frequencies impose certain coverage and device design challenges that need to be efficiently overcome. To this end, the development of cost- and energy-efficient approaches for scaling these networks to realistic scenarios constitute a necessity. Among the recent research trends contributing to these objectives belongs the technology of Reconfigurable Intelligent Surfaces (RISs). In fact, several high-level descriptions of THz systems based on RISs have been populating the literature. Nevertheless, hardware implementations of those systems are still very scarce, and not at the scale intended for most envisioned THz scenarios. In this paper, we overview some of the most significant hardware design and signal processing challenges with THz RISs, and present a preliminary analysis of their impact on the overall link budget and system performance, conducted in the framework of the ongoing TERRAMETA project.
