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CAMASim: A Comprehensive Simulation Framework for Content-Addressable Memory based Accelerators

Mengyuan Li, Shiyi Liu, Mohammad Mehdi Sharifi, X. Sharon Hu

TL;DR

CAMASim is introduced, a first comprehensive CAM accelerator simulation framework, emphasizing modularity, flexibility, and generality, and streamlines the design space exploration for CAM-based accelerator, aiding researchers in developing effective CAM-based accelerators for various search-intensive applications.

Abstract

Content addressable memory (CAM) stands out as an efficient hardware solution for memory-intensive search operations by supporting parallel computation in memory. However, developing a CAM-based accelerator architecture that achieves acceptable accuracy, while minimizing hardware cost and catering to both exact and approximate search, still presents a significant challenge especially when considering a broader spectrum of applications. This complexity stems from CAM's rapid evolution across multiple levels--algorithms, architectures, circuits, and underlying devices. This paper introduces CAMASim, a first comprehensive CAM accelerator simulation framework, emphasizing modularity, flexibility, and generality. CAMASim establishes the detailed design space for CAM-based accelerators, incorporates automated functional simulation for accuracy, and enables hardware performance prediction, by leveraging a circuit-level CAM modeling tool. This work streamlines the design space exploration for CAM-based accelerator, aiding researchers in developing effective CAM-based accelerators for various search-intensive applications.

CAMASim: A Comprehensive Simulation Framework for Content-Addressable Memory based Accelerators

TL;DR

CAMASim is introduced, a first comprehensive CAM accelerator simulation framework, emphasizing modularity, flexibility, and generality, and streamlines the design space exploration for CAM-based accelerator, aiding researchers in developing effective CAM-based accelerators for various search-intensive applications.

Abstract

Content addressable memory (CAM) stands out as an efficient hardware solution for memory-intensive search operations by supporting parallel computation in memory. However, developing a CAM-based accelerator architecture that achieves acceptable accuracy, while minimizing hardware cost and catering to both exact and approximate search, still presents a significant challenge especially when considering a broader spectrum of applications. This complexity stems from CAM's rapid evolution across multiple levels--algorithms, architectures, circuits, and underlying devices. This paper introduces CAMASim, a first comprehensive CAM accelerator simulation framework, emphasizing modularity, flexibility, and generality. CAMASim establishes the detailed design space for CAM-based accelerators, incorporates automated functional simulation for accuracy, and enables hardware performance prediction, by leveraging a circuit-level CAM modeling tool. This work streamlines the design space exploration for CAM-based accelerator, aiding researchers in developing effective CAM-based accelerators for various search-intensive applications.
Paper Structure (14 sections, 5 figures, 4 tables)

This paper contains 14 sections, 5 figures, 4 tables.

Table of Contents

  1. Introduction
  2. Background
  3. Content-addressable Memory
  4. Existing CAM Simulators
  5. CAMASim
  6. Overview of CAMASim
  7. CAM-based Accelerator Design Space
  8. Functional Simulator
  9. Performance Evaluator
  10. Evaluation
  11. Validation
  12. Case Study
  13. Impact of Data Type and Subarray Size
  14. Impact of Circuit Non-idealities

Figures (5)

  • Figure 1: CAMASim framework. (a) High-level framework. (b) Functional simulator. (c) Performance evaluator.
  • Figure 2: Hierarchical structure of CAM-based accelerator design.
  • Figure 3: (a) Illustration of the partition and merge problem in CAM-based accelerator. (b) Existing horizontal and vertical merge schemes for exact/best/threshold matches.
  • Figure 4: Accuracy and EDP from CAMASim with different number of embedding dimensions and CAM subarray column sizes. No quantization accuracy is 98.3%. (Left) 2-bit quantization. (Right) 3-bit quantization.
  • Figure 5: Accuracy as a function of (left) device variation and (right) sensing limit for selected settings.