Faithful Dynamic Timing Analysis of Digital Circuits Using Continuous Thresholded Mode-Switched ODEs

TL;DR

This paper proves that the mapping from digital input signals to digital output signals is continuous for a large class of thresholded hybrid systems, and shows that, under some mild conditions regarding causality, this continuity also continues to hold for arbitrary compositions, which in turn guarantees that the composition faithfully captures the analog reality.

Abstract

Thresholded hybrid systems are restricted dynamical systems, where the current mode, and hence the ODE system describing its behavior, is solely determined by externally supplied digital input signals and where the only output signals are digital ones generated by comparing an internal state variable to a threshold value. An attractive feature of such systems is easy composition, which is facilitated by their purely digital interface. A particularly promising application domain of thresholded hybrid systems is digital integrated circuits: Modern digital circuit design considers them as a composition of Millions and even Billions of elementary logic gates, like inverters, GOR and Gand. Since every such logic gate is eventually implemented as an electronic circuit, however, which exhibits a behavior that is governed by some ODE system, thresholded hybrid systems are ideally suited for making the transition from the analog to the digital world rigorous. In this paper, we prove that the mapping from digital input signals to digital output signals is continuous for a large class of thresholded hybrid systems. Moreover, we show that, under some mild conditions regarding causality, this continuity also continues to hold for arbitrary compositions, which in turn guarantees that the composition faithfully captures the analog reality. By applying our generic results to some recently developed thresholded hybrid gate models, both for single-input single-output gates like inverters and for a two-input CMOS NOR gate, we show that they are continuous. Moreover, we provide a novel thresholded hybrid model for the two-input NOR gate, which is not only continuous but also, unlike the existing one, faithfully models all multi-input switching effects.

Figures (7)

• Figure 1: Thresholded mode-switched ODE with a single mode input $i$, the delayed input $i_d$, two continuous states $x,y$, and two thresholded outputs $\Theta_\alpha(x)$ and $\Theta_\beta(y)$.
• Figure 2: A digitized hybrid gate model (for a non-inverting buffer) satisfying the involution property and a sample execution. Adapted from FNNS19:TCAD.
• Figure 3: Circuit ${\mathcal{C}}$ (left) and ${\mathcal{C}}_3(O)$ (right) under the assumption that the gate $B$ has initial value $0$. It is $z(X_0)=0$, $z(I)=z(A^{(2)})=\infty$, $z(B^{(1)})=1$, $z(B^{(2)})=2$, $z(C^{(3)})=3$, and $z(O^{(3)})=3$.
• Figure 4: MIS effects in the measured delay of a $15$nm technology CMOS NOR gate.
• Figure 5: Comparison of the measured delay $\delta_S^{\downarrow/\uparrow}(\Delta)$ of a real $15$nm CMOS NOR gate (red dashed line) and the delay prediction of the simple digitized hybrid model (green line) from FMOS22:DATE.

Theorems & Definitions (53)

• Lemma 1
• Lemma 2: Existence and uniqueness of matching output signal
• proof
• Theorem 3
• proof
• Lemma 4
• proof
• Lemma 5
• proof
• Theorem 6