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AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators

Mahdi Taheri, Natalia Cherezova, Samira Nazari, Ahsan Rafiq, Ali Azarpeyvand, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin

TL;DR

It is demonstrated that the proposed architecture enables a multiplication with a reliability level close to the multipliers protected by TMR utilizing 63.54% less area and having 39.06% lower power-delay product compared to the exact multiplier.

Abstract

In this paper, we propose an architecture of a novel adaptive fault-tolerant approximate multiplier tailored for ASIC-based DNN accelerators.

AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators

TL;DR

It is demonstrated that the proposed architecture enables a multiplication with a reliability level close to the multipliers protected by TMR utilizing 63.54% less area and having 39.06% lower power-delay product compared to the exact multiplier.

Abstract

In this paper, we propose an architecture of a novel adaptive fault-tolerant approximate multiplier tailored for ASIC-based DNN accelerators.
Paper Structure (11 sections, 5 figures, 2 tables)

This paper contains 11 sections, 5 figures, 2 tables.

Figures (5)

  • Figure 1: AdAM architecture
  • Figure 2: Adaptive adder architecture: $a$ and $b$ are inputs, $c$ is carry values and PFA stands for partial full adder
  • Figure 3: Fault-tolerance and error introduced based on different LOD cases
  • Figure 4: Hardware efficiency (area) and fault resilience (fault coverage) trade-offs in AlexNet (up) and VGG-16 (down). Unp-exact: unprotected exact multiplier, Unp-AxM: unprotected approximate multiplier, Pro-TMR: exact multiplier protected by TMR, Pro-AdAM: proposed multiplier
  • Figure 5: PDP and vulnerability tradeoffs (considering SDC-5) in different methods