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Towards Memory-Efficient Traffic Policing in Time-Sensitive Networking

Xuyan Jiang, Xiangrui Yang, Tongqing Zhou, Wenwen Fu, Wei Quan, Yihao Jiao, Yinhan Sun, Zhigang Sun

TL;DR

Results using commercial FPGAs in typical aerospace scenarios show that FooDog could keep end-to-end time-sensitive traffic jitter<150 nanoseconds in the presence of abnormal traffic, comparable to typical TSN performance without anomalies.

Abstract

Time-Sensitive Networking (TSN) is an emerging real-time Ethernet technology that provides deterministic communication for time-critical traffic. At its core, TSN relies on Time-Aware Shaper (TAS) for pre-allocating frames in specific time intervals and Per-Stream Filtering and Policing (PSFP) for mitigating the fatal disturbance of unavoidable frame drift. However, as first identified in this work, PSFP incurs heavy memory consumption during policing, hindering normal switching functionalities. This work proposes a lightweight policing design called FooDog, which could facilitate sub-microsecond jitter with ultra-low memory consumption. FooDog employs a period-wise and stream-wise structure to realize the memory-efficient PSFP without loss of determinism. Results using commercial FPGAs in typical aerospace scenarios show that FooDog could keep end-to-end time-sensitive traffic jitter <150 nanoseconds in the presence of abnormal traffic, comparable to typical TSN performance without anomalies. Meanwhile, it consumes merely hundreds of kilobits of memory, reducing >90% of on-chip memory overheads than unoptimized PSFP design.

Towards Memory-Efficient Traffic Policing in Time-Sensitive Networking

TL;DR

Results using commercial FPGAs in typical aerospace scenarios show that FooDog could keep end-to-end time-sensitive traffic jitter<150 nanoseconds in the presence of abnormal traffic, comparable to typical TSN performance without anomalies.

Abstract

Time-Sensitive Networking (TSN) is an emerging real-time Ethernet technology that provides deterministic communication for time-critical traffic. At its core, TSN relies on Time-Aware Shaper (TAS) for pre-allocating frames in specific time intervals and Per-Stream Filtering and Policing (PSFP) for mitigating the fatal disturbance of unavoidable frame drift. However, as first identified in this work, PSFP incurs heavy memory consumption during policing, hindering normal switching functionalities. This work proposes a lightweight policing design called FooDog, which could facilitate sub-microsecond jitter with ultra-low memory consumption. FooDog employs a period-wise and stream-wise structure to realize the memory-efficient PSFP without loss of determinism. Results using commercial FPGAs in typical aerospace scenarios show that FooDog could keep end-to-end time-sensitive traffic jitter <150 nanoseconds in the presence of abnormal traffic, comparable to typical TSN performance without anomalies. Meanwhile, it consumes merely hundreds of kilobits of memory, reducing >90% of on-chip memory overheads than unoptimized PSFP design.
Paper Structure (23 sections, 11 equations, 24 figures)

This paper contains 23 sections, 11 equations, 24 figures.

Table of Contents

  1. Introduction
  2. Preliminaries and Related Work
  3. TAS for determinism
  4. Mitigating the impact of abnormal traffic
  5. Motivation
  6. Motivating Example
  7. Root cause analysis
  8. Design of FooDog
  9. Design Decisions
  10. Overview
  11. Period-wise and Stream-wise GCL
  12. Policing Engines
  13. Workflow
  14. FooDog Constraints
  15. Discussions
  16. ...and 8 more sections

Figures (24)

  • Figure 1: A sketch pipeline of using TAS for deterministic communication and PSFP for abnormality removal.
  • Figure 2: A toy example of the scheduling of TS streams: (a) topology; (b) scheduling of ports when there are no abnormal streams and only TAS gate is enabled; (c) scheduling of ports when there is an abnormal frame $f_2$ and only TAS gate is enabled; (d) scheduling of ports when there is an abnormal frame $f_2$ and both TAS and PSFP gates are enabled.
  • Figure 3: Standard PSFP GCL's BRAM usage of a single TSN switch with four ports. Proportion is the ratio of the number of streams with a period of 1 ms out of the total number of streams.
  • Figure 4: Fields of a PSFP GCL defined in the TSN standardQci
  • Figure 5: Possible approaches for design PSFP GCL.
  • ...and 19 more figures