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SFQ counter-based precomputation for large-scale cryogenic VQE machines

Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura

Abstract

The variational quantum eigensolver (VQE) is a promising candidate that brings practical benefits from quantum computing. However, the required bandwidth in/out of a cryostat is a limiting factor to scale cryogenic quantum computers. We propose a tailored counter-based module with single flux quantum circuits in 4-K stage which precomputes a part of VQE calculation and reduces the amount of inter-temperature communication. The evaluation shows that our system reduces the required bandwidth by 97%, and with this drastic reduction, total power consumption is reduced by 93% in the case where 277 VQE programs are executed in parallel on a 10000-qubit machine.

SFQ counter-based precomputation for large-scale cryogenic VQE machines

Abstract

The variational quantum eigensolver (VQE) is a promising candidate that brings practical benefits from quantum computing. However, the required bandwidth in/out of a cryostat is a limiting factor to scale cryogenic quantum computers. We propose a tailored counter-based module with single flux quantum circuits in 4-K stage which precomputes a part of VQE calculation and reduces the amount of inter-temperature communication. The evaluation shows that our system reduces the required bandwidth by 97%, and with this drastic reduction, total power consumption is reduced by 93% in the case where 277 VQE programs are executed in parallel on a 10000-qubit machine.
Paper Structure (25 sections, 14 equations, 5 figures, 3 tables)

This paper contains 25 sections, 14 equations, 5 figures, 3 tables.

Figures (5)

  • Figure 1: (a) Baseline and (b) proposed system designs of SQC with their VQE procedures.
  • Figure 2: Inter-temperature communication timing in baseline VQE machine without (with) GM
  • Figure 3: Inter-temperature communication in VQE using proposed architecture
  • Figure 4: Circuit diagram of our precomputation SFQ circuit
  • Figure 5: Required bandwidth and power dissipation of baseline and proposed systems without and with GM for (a) single- and (b)---(c) multi-program cases. Power dissipation includes heat inflow and peripherals power consumption.