An All-Optical General-Purpose CPU and Optical Computer Architecture

TL;DR

This paper demonstrates for the first time a scheme to enable general-purpose digital data processing in an integrated form and presents the photonic integrated circuit (PIC) implementation and presents a comprehensive architectural framework for all-optical computing to go beyond.

Abstract

Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local chip interconnects, using optics to drastically increase efficiency. In this paper, we explore what comes after the successful migration to optical interconnects, as with this inefficiency solved, the main source of energy consumption will be electronic digital computing, memory and electro-optical conversion. Our approach attempts to address all these issues by introducing efficient all-optical digital computing and memory, which in turn eliminates the need for electro-optical conversions. Here, we demonstrate for the first time a scheme to enable general purpose digital data processing in an integrated form and present our photonic integrated circuit (PIC) implementation. For this demonstration we implemented a URISC architecture capable of running any classical piece of software all-optically and present a comprehensive architectural framework for all-optical computing to go beyond.

Figures (10)

• Figure 1: Our all-optical, cross-domain computing architecture in the form of an XPU (a). The core of this architecture is implemented using photonic integrated circuits (PIC) shown in (b), with the focus being on the logic processing unit (LPU) and memories (c), where for this demonstration, we show for the first time how it operates as a stand-alone all-optical CPU.
• Figure 2: Instruction statistics in (a) average general-purpose (GP) processing on an x86 processor running a Windows operating system, executing day-to-day tasksIbrahim:2010, (b) average computing workloads, such as video decoding, sorting algorithms or simulations Kankowski:2009Ndu:2012SPEC and (c) average AI / ML workloads, including training and inferenceChen:2019.
• Figure 3: Visualization of Landauer's limit based on Frank:2020 and extended with IEA data from 2022IEA and recent benchmarks. The floating-point operations per second (FLOPS) for GPUs, NPUs, TPUs and CPUs are based on the reported non-sparse tensor values. The angle of the diagonal orange, red and dotted lines represent constant FLOPS/W, with the arrows indicating that the overall trend in future devices to be more efficient (lowering FLOPS/W). The orange zones indicate no-go areas for the current irreversible approach to computing, but which can be crossed into with reversible computing.
• Figure 4: All blocks in this architecture, as well as all data paths (data transfer and RFU calls) are all-optical. Orange highlights memory storage primarily based on non-volatile technologies (RWORM, ROM) and blue volatile memories. The green blocks indicate compute units and the XPU can communicate with the outside world using interfaces, such as the RDMA interface depicted here.
• Figure 5: Compiler stack to enable optical computing using XPUs in a HPC environment. The green highlights indicate software and libraries that must be specifically implemented for the memory allocation patterns from Section \ref{['sec:cow']}, but are mostly abstracted away from the programmer to allow a seamless adoption.